Patrick Georgi (patrick@georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4409
-gerrit
commit ed1eec1a20b1602b0c8cf104eab64860c99b3f6a Author: Duncan Laurie dlaurie@chromium.org Date: Tue Jul 30 16:15:14 2013 -0700
lynxpoint: XHCI: Advertise D3 as lowest wake state
The recommended value in docs is D2, but lynxpoint XHCI does not even support D2 state which causes the kernel to think this device cannot be used as a wake source:
kernel: xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI kernel: ACPI: Device does not support D2 kernel: xhci_hcd 0000:00:14.0: System wakeup disabled by ACPI
Additionally this means the kernel will never put the device into D3 state by itself. There is SMI code that will put the device into D3 before suspend so advertising D3 here should be correct.
With this change the kernel will put the controller into D3 on suspend and back to D0 on resume, including executing the ACPI methods for _PS0/_PS3 that contain chipset specific workarounds.
In addition add a _PSC method to directly return the D state from the device registers. With ALL USB devices removed the XHCI controller goes into D3 state and the kernel can have a hard time determining the state of the device at boot.
A kernel compiled with CONFIG_ACPI_DEBUG=y and module parameters acpi.debug_layer=0x7f acpi.debug_level=0x2f can be used to see what ACPI methods are executed:
kernel: xhci_hcd 0000:00:14.0: System wakeup enabled by ACPI kernel: ACPI: Execute Method [_SB_.PCI0.XHCI._PS3] (Node ffff8801000a7f50) kernel: ACPI: Preparing to enter system sleep state S3 ... kernel: ACPI: Waking up from system sleep state S3 kernel: ACPI: Execute Method [_SB_.PCI0.XHCI._PS0] (Node ffff8801000a7f28) kernel: xhci_hcd 0000:00:14.0: power state changed by ACPI to D0
Change-Id: Ic64040eb4dd1947a1e2f0ee253a64be683e0ec70 Signed-off-by: Duncan Laurie dlaurie@chromium.org
meld with s3d
Change-Id: Ic6789720c4efe661dcb03a4afce8d88115854472 Reviewed-on: https://gerrit.chromium.org/gerrit/63916 Tested-by: Duncan Laurie dlaurie@chromium.org Reviewed-by: Aaron Durbin adurbin@chromium.org Commit-Queue: Duncan Laurie dlaurie@chromium.org --- src/southbridge/intel/lynxpoint/acpi/usb.asl | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/lynxpoint/acpi/usb.asl b/src/southbridge/intel/lynxpoint/acpi/usb.asl index 1a0ad34..c22dbb8 100644 --- a/src/southbridge/intel/lynxpoint/acpi/usb.asl +++ b/src/southbridge/intel/lynxpoint/acpi/usb.asl @@ -238,6 +238,11 @@ Device (XHCI) LPCL () }
+ Method (_PSC, 0, NotSerialized) + { + Return (^D0D3) + } + Method (_PS0, 0, Serialized) { If (LEqual (^DVID, 0xFFFF)) { @@ -375,12 +380,12 @@ Device (XHCI)
Method(_S3D,0) // Highest D State in S3 State { - Return (2) + Return (3) }
Method(_S4D,0) // Highest D State in S4 State { - Return (2) + Return (3) }
Device (HUB7)