[S] Change in coreboot[main]: mb/google/nissa/var/riven: Set VccIn Aux Imon IccMax to 25A

[David Wu (Code Review)]

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83986?usp=email )

Change subject: mb/google/nissa/var/riven: Set VccIn Aux Imon IccMax to 25A
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mb/google/nissa/var/riven: Set VccIn Aux Imon IccMax to 25A

Iccmax of VccIn_Aux is 25A with MBVR design.

BUG=b:348258637
TEST=Local build successfully and boot to OS normally.

Change-Id: I59c420c03a8f01d185f616a2212798266b4251e0
Signed-off-by: David Wu 
---
M src/mainboard/google/brya/variants/riven/Makefile.mk
A src/mainboard/google/brya/variants/riven/ramstage.c
2 files changed, 10 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/83986/1

diff --git a/src/mainboard/google/brya/variants/riven/Makefile.mk b/src/mainboard/google/brya/variants/riven/Makefile.mk
index 86ba20d..393ccfd 100644
--- a/src/mainboard/google/brya/variants/riven/Makefile.mk
+++ b/src/mainboard/google/brya/variants/riven/Makefile.mk
@@ -6,3 +6,4 @@
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
 ramstage-$(CONFIG_FW_CONFIG) += variant.c
 ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/brya/variants/riven/ramstage.c b/src/mainboard/google/brya/variants/riven/ramstage.c
new file mode 100644
index 0000000..fe0c01b
--- /dev/null
+++ b/src/mainboard/google/brya/variants/riven/ramstage.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <soc/ramstage.h>
+
+void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+{
+	params->VccInAuxImonIccImax = 100; // 25 * 4
+	printk(BIOS_INFO, "Override VccInAuxImonIccImax = %d\n", params->VccInAuxImonIccImax);
+}