Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal.
Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/72723 )
Change subject: [WIP] soc/intel/meteorlake: Enable Trace Hub ......................................................................
[WIP] soc/intel/meteorlake: Enable Trace Hub
Change-Id: I335b15788fefb83f9f62560b160d1e84494b262a Signed-off-by: Pratikkumar Prajapati pratikkumar.v.prajapati@intel.com --- M src/soc/intel/meteorlake/Kconfig M src/soc/intel/meteorlake/chipset.cb M src/soc/intel/meteorlake/romstage/fsp_params.c 3 files changed, 14 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/72723/1
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index c00be8f..86646fd 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -94,6 +94,7 @@ select UDELAY_TSC select UDK_202111_BINDING select X86_INIT_NEED_1_SIPI + select SOC_INTEL_COMMON_BLOCK_TRACEHUB
config SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT bool diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 0962a7c..649a196 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -170,6 +170,6 @@ device pci 1f.4 alias smbus off end device pci 1f.5 alias fast_spi on end device pci 1f.6 alias gbe off end - device pci 1f.7 alias npk off end + device pci 1f.7 alias npk on end end end diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index c01896f..c8f3468 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -275,7 +275,8 @@ const struct soc_intel_meteorlake_config *config) { /* Set debug probe type */ - m_cfg->PlatformDebugOption = CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT; + m_cfg->PlatformDebugOption = 2; + m_cfg->DciEn = 1;
/* CrashLog config */ if (CONFIG(SOC_INTEL_CRASHLOG)) {