[M] Change in coreboot[master]: soc/intel/cmn/cse: Store ISH firmware version into CBMEM

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74385 )

Change subject: soc/intel/cmn/cse: Store ISH firmware version into CBMEM
......................................................................

soc/intel/cmn/cse: Store ISH firmware version into CBMEM

The patch stores the ISH in the CBMEM table. It verifies CSE has been
updated by comparing previous and current CSE versions. If it has, the
patch updates the previous CSE version with the current CSE version. It
then updates the CBMEM table with the current ISH version.

BUG=b:273661726
TEST=The current and old CSE and ISH versions are verified on the
google/nissa during cold and warm reboots.

Additionally, version updates are verified by a debug patch that
purposely updated the stored cse version.

Signed-off-by: Dinesh Gehlot 
Change-Id: Ie5c5faf926c75b05d189fb1118020fff024fc3e0

Signed-off-by: Subrata Banik 
Change-Id: I1985a156080959b86ed3636b764efa673c3ae018
---
M src/soc/intel/common/block/cse/cse_lite.c
1 file changed, 70 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/74385/1

diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 87a78ca..60126fb 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -1244,6 +1244,44 @@
    return send_get_fpt_partition_info_cmd(id, resp);
 }

+/*
+* This API can only be executed after memory has been initialized. This is because the
+* command relies on resources that are not available until DRAM initialization command
+* has been sent.
+*/
+static void store_ish_version(void)
+{
+	if (vboot_recovery_mode_enabled())
+		return;
+
+	struct cse_fw_partition_info *version;
+	version = cbmem_find(CBMEM_ID_CSE_PARTITION_VERSION);
+
+	/*
+	* Compare if stored cse version (from the previous boot) is same as current
+	* running cse version.
+	*/
+	if (memcmp(&version->ish_partition_info.prev_cse_fw_version,
+		&version->cur_cse_fw_version, sizeof(struct fw_version))) {
+		/*
+		 * Current running CSE version is different than previous stored CSE version
+		 * which could be due to CSE update or rollback, hence, need to send ISHC
+		 * partition info cmd to know the currently running ISH version.
+		 */
+
+		struct fw_version_resp resp;
+		if (cse_get_fpt_partition_info(FPT_PARTITION_NAME_ISHC, &resp) == CB_SUCCESS) {
+			/* Update stored cse version with current version */
+			cse_copy_fw_version(&(version->ish_partition_info.prev_cse_fw_version),
+				&(version->cur_cse_fw_version));
+
+			/* Since cse version has been updated, ish version needs to be updated. */
+			cse_copy_fw_version(&(version->ish_partition_info.cur_ish_fw_version),
+				&(resp.manifest_data.version));
+		}
+	}
+}
+
 static void ramstage_cse_fw_sync(void *unused)
 {
    bool s3wake;
@@ -1254,8 +1292,10 @@
    	cse_fw_sync();
    	timestamp_add_now(TS_CSE_FW_SYNC_END);

-		if (CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION))
+		if (CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION)) {
    		store_cse_rw_fw_version();
+			store_ish_version();
+		}
    }
 }

@@ -1267,10 +1307,12 @@
    if (s3wake)
    	return;

-	/* Store the CSE RW Firmware Version into CBMEM */
+	/* Store the CSE/ISH RW Firmware Version into CBMEM */
    if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_ROMSTAGE)
-		&& CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION))
+		&& CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION)) {
    	store_cse_rw_fw_version();
+		store_ish_version();
+	}
 }

BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, ramstage_store_cse_fpt_info, NULL);