David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45729 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
mb/google/puff: Update DPTF parameters for faffy
1. TSRO trip point from 75C change to 73C 2. Sample period time from 5s change to 60s
BUG=b:160385395 BRANCH=puff TEST=build and verify by thermal team
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I0b000841845ce793be0e52fc28a07ac6a931ef7a --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/45729/1
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index a05cb9d..1ac9414 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -281,7 +281,7 @@ chip drivers/intel/dptf ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 73, 60000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45729 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
Patch Set 1: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45729 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
Patch Set 1: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45729 )
Change subject: mb/google/puff: Update DPTF parameters for faffy ......................................................................
mb/google/puff: Update DPTF parameters for faffy
1. TSRO trip point from 75C change to 73C 2. Sample period time from 5s change to 60s
BUG=b:160385395 BRANCH=puff TEST=build and verify by thermal team
Signed-off-by: David Wu david_wu@quanta.corp-partner.google.com Change-Id: I0b000841845ce793be0e52fc28a07ac6a931ef7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/45729 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sam McNally sammc@google.com Reviewed-by: Edward O'Callaghan quasisec@chromium.org --- M src/mainboard/google/hatch/variants/faffy/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/faffy/overridetree.cb b/src/mainboard/google/hatch/variants/faffy/overridetree.cb index a05cb9d..1ac9414 100644 --- a/src/mainboard/google/hatch/variants/faffy/overridetree.cb +++ b/src/mainboard/google/hatch/variants/faffy/overridetree.cb @@ -281,7 +281,7 @@ chip drivers/intel/dptf ## Passive Policy register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)" - register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000)" + register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 73, 60000)"
## Critical Policy register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
-
David Wu (Code Review) -
Edward O'Callaghan (Code Review)
-
Sam McNally (Code Review)