Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix master ......................................................................
google/drallion: Fix master
One case slipped past the review and rebase.
Change-Id: Id01df30d10e202e9672bf5be799a84f4f202fe24 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/drallion/chromeos.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/34812/1
diff --git a/src/mainboard/google/drallion/chromeos.c b/src/mainboard/google/drallion/chromeos.c index 7aaf401..0eb311b 100644 --- a/src/mainboard/google/drallion/chromeos.c +++ b/src/mainboard/google/drallion/chromeos.c @@ -122,6 +122,6 @@ { #if ENV_RAMSTAGE /* Ensure system powers up after CR50 reset */ - pmc_set_afterg3(MAINBOARD_POWER_STATE_ON); + pmc_soc_set_afterg3_en(true); #endif }
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix master ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/34812/1/src/mainboard/google/dralli... File src/mainboard/google/drallion/chromeos.c:
https://review.coreboot.org/c/coreboot/+/34812/1/src/mainboard/google/dralli... PS1, Line 123: #if ENV_RAMSTAGE Outdated copy of Sarien btw.
Nico Huber has uploaded a new patch set (#2) to the change originally created by Kyösti Mälkki. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix build issue due to recent merge ......................................................................
google/drallion: Fix build issue due to recent merge
One case slipped past the review and rebase of 733c28fa42 (soc/intel/{cnl,icl}: Use new power-failure-state API).
Change-Id: Id01df30d10e202e9672bf5be799a84f4f202fe24 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/mainboard/google/drallion/chromeos.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/34812/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix build issue due to recent merge ......................................................................
Patch Set 2: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix build issue due to recent merge ......................................................................
Patch Set 2: Code-Review+2
Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34812 )
Change subject: google/drallion: Fix build issue due to recent merge ......................................................................
google/drallion: Fix build issue due to recent merge
One case slipped past the review and rebase of 733c28fa42 (soc/intel/{cnl,icl}: Use new power-failure-state API).
Change-Id: Id01df30d10e202e9672bf5be799a84f4f202fe24 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34812 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/drallion/chromeos.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Furquan Shaikh: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/drallion/chromeos.c b/src/mainboard/google/drallion/chromeos.c index 7aaf401..0eb311b 100644 --- a/src/mainboard/google/drallion/chromeos.c +++ b/src/mainboard/google/drallion/chromeos.c @@ -122,6 +122,6 @@ { #if ENV_RAMSTAGE /* Ensure system powers up after CR50 reset */ - pmc_set_afterg3(MAINBOARD_POWER_STATE_ON); + pmc_soc_set_afterg3_en(true); #endif }