[S] Change in coreboot[main]: cpu/x86/64bit/mode_switch: Add workaround for FSP bug

[Patrick Rudolph (Code Review)]

Attention is currently required from: Jérémy Compostella.

Hello Jérémy Compostella, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85789?usp=email

to look at the new patch set (#2).

The following approvals got outdated and were removed:
Code-Review+1 by Jérémy Compostella, Verified+1 by build bot (Jenkins)

Change subject: cpu/x86/64bit/mode_switch: Add workaround for FSP bug
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cpu/x86/64bit/mode_switch: Add workaround for FSP bug

FSP is able to backup and restore the bootloader IDT on entry/exit.
Even though it sets up it's own IDT, FSP checks the bootloader IDT size
and deadloops without warning if it's too big.

On x86_64 coreboot the IDT is naturally bigger than on x86_32 and thus
x86_32 FSP might die on entry. To workaround this issue do:

* Backup and restore the IDT in protected_mode_call_wrapper
* Load zero IDT in protected mode before jumping to function

TEST: Can boot on SPR FSP (x86_32) using x86_64 coreboot with
      exceptions in romstage enabled.

Change-Id: I56367d8153aa10a9b1bcaa5ffde8ebe202e8c00c
Signed-off-by: Patrick Rudolph 
---
M src/cpu/x86/64bit/mode_switch.S
1 file changed, 18 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/85789/2