Attention is currently required from: Jason Glenesk, Mariusz Szafrański, Marshall Dawson, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Andrey Petrov, Patrick Rudolph, Felix Held. Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49272 )
Change subject: [WIP] ACPI GNVS: Move dev_count_cpu() ......................................................................
[WIP] ACPI GNVS: Move dev_count_cpu()
Change-Id: I7dd45a840b3585fd24c31fd923b991c34ab4d783 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/cpu/x86/mp_init.c M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/soc/intel/alderlake/acpi.c M src/soc/intel/apollolake/acpi.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/broadwell/pch/lpc.c M src/soc/intel/cannonlake/acpi.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/elkhartlake/acpi.c M src/soc/intel/icelake/acpi.c M src/soc/intel/jasperlake/acpi.c M src/soc/intel/skylake/acpi.c M src/soc/intel/tigerlake/acpi.c M src/soc/intel/xeon_sp/cpx/soc_acpi.c M src/soc/intel/xeon_sp/skx/soc_acpi.c M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 20 files changed, 7 insertions(+), 63 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/49272/1
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 01c1d5f..2cc2e33a 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -123,6 +123,13 @@ static int global_num_aps; static struct mp_flight_plan mp_info;
+#if 0 +void mp_fill_gnvs(struct global_nvs *gnvs) +{ + gnvs->pcnt = dev_count_cpu(); +} +#endif + /* Keep track of device structure for each CPU. */ static struct device *cpus_dev[CONFIG_MAX_CPUS];
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 743b32c..70c93c4 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -399,9 +399,6 @@ /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; - - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); }
void southbridge_inject_dsdt(const struct device *device) diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index dd8f29f..e956e66 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -167,9 +167,6 @@ /* Set unknown wake source */ gnvs->pm1i = ~0ULL; gnvs->gpei = ~0ULL; - - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); }
void southbridge_inject_dsdt(const struct device *device) diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index 663eecb..d1ab6a0 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -285,9 +285,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 63787ed..773f56e 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -80,9 +80,6 @@ /* Set unknown wake source */ gnvs->pm1i = ~0ULL;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = cfg->dptf_enable;
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index cf031b9..d379beb 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -61,9 +61,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = nc_read_top_of_low_memory(); } diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index caeae39..0be5ca6 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -64,9 +64,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = nc_read_top_of_low_memory();
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index 03a6872..5111601 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -604,9 +604,6 @@ { /* Set unknown wake source */ gnvs->pm1i = -1; - - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); }
static void southcluster_inject_dsdt(const struct device *device) diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index b8fa9a7..bfb719f 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -189,9 +189,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 8ef2faa..3753bd9 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -62,9 +62,6 @@
void soc_fill_gnvs(struct global_nvs *gnvs) { - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Top of Low Memory (start of resource allocation) */ gnvs->tolm = (uintptr_t)cbmem_top();
diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c index 4ea3e25..88336fe 100644 --- a/src/soc/intel/elkhartlake/acpi.c +++ b/src/soc/intel/elkhartlake/acpi.c @@ -253,9 +253,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c index a9e56fa..4a84446 100644 --- a/src/soc/intel/icelake/acpi.c +++ b/src/soc/intel/icelake/acpi.c @@ -184,9 +184,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c index e480f55..ea5fb0b 100644 --- a/src/soc/intel/jasperlake/acpi.c +++ b/src/soc/intel/jasperlake/acpi.c @@ -280,9 +280,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 2406dc5..38308e4 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -163,9 +163,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 69b7b17..354e3d2 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -280,9 +280,6 @@ /* Set unknown wake source */ gnvs->pm1i = -1;
- /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - /* Enable DPTF based on mainboard configuration */ gnvs->dpte = config->dptf_enable;
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c index 9d5f47b..99326ee 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <assert.h> @@ -14,7 +13,6 @@ #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/msr.h> -#include <soc/nvs.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/soc_util.h> @@ -28,13 +26,6 @@ return current; }
-void soc_fill_gnvs(struct global_nvs *gnvs) -{ - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - printk(BIOS_DEBUG, "%s gnvs->pcnt: %d\n", __func__, gnvs->pcnt); -} - int soc_madt_sci_irq_polarity(int sci) { if (sci >= 20) diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index a7050f0..330f473 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <assert.h> @@ -14,7 +13,6 @@ #include <soc/iomap.h> #include <device/mmio.h> #include <soc/msr.h> -#include <soc/nvs.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/soc_util.h> @@ -28,13 +26,6 @@ return current; }
-void soc_fill_gnvs(struct global_nvs *gnvs) -{ - /* CPU core count */ - gnvs->pcnt = dev_count_cpu(); - printk(BIOS_DEBUG, "%s gnvs->pcnt: %d\n", __func__, gnvs->pcnt); -} - int soc_madt_sci_irq_polarity(int sci) { if (sci >= 20) diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index bb1ab6b..a3e2b42 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -655,7 +655,6 @@ { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); }
void southbridge_inject_dsdt(const struct device *dev) diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 3f59a19..6144257 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -550,7 +550,6 @@ { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); }
void southbridge_inject_dsdt(const struct device *dev) diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 05593b1..5915fe8 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -698,7 +698,6 @@ { gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ - gnvs->pcnt = dev_count_cpu(); }
void southbridge_inject_dsdt(const struct device *dev)
-
Kyösti Mälkki (Code Review)