[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Return resource count for create_ioat_domain

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83195?usp=email )

Change subject: soc/intel/xeon_sp/spr: Return resource count for create_ioat_domain
......................................................................

soc/intel/xeon_sp/spr: Return resource count for create_ioat_domain

create_ioat_domain creates the domain device with a number of
resources with index starting from 0. Return the created resource
count so that the count could be used as the starting index for
additional resource creation outside create_ioat_domain.

TEST=Build and boot on intel/archercity CRB

Change-Id: I9e719ae8407c7f31f88dbb407f003e2ded8f0faf
Signed-off-by: Shuo Liu 
---
M src/soc/intel/xeon_sp/spr/ioat.c
1 file changed, 12 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/83195/1

diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c
index ac968d1..129d270 100644
--- a/src/soc/intel/xeon_sp/spr/ioat.c
+++ b/src/soc/intel/xeon_sp/spr/ioat.c
@@ -34,7 +34,7 @@
    			const unsigned int bus_base, const unsigned int bus_limit,
    			const resource_t mem32_base, const resource_t mem32_limit,
    			const resource_t mem64_base, const resource_t mem64_limit,
-				const char *prefix, const size_t pci_segment_group)
+				const char *prefix, const size_t pci_segment_group, int *res_count)
 {
    union xeon_domain_path new_path = {
    	.domain_path = dp.domain_path
@@ -68,6 +68,9 @@
    if (mem64_base <= mem64_limit)
    	domain_mem_window_from_to(domain, index++, mem64_base, mem64_limit + 1);

+	if (res_count)
+		*res_count = index;
+
    return domain;
 }

@@ -100,7 +103,7 @@
    bus_base = sr->BusBase + CPM_BUS_OFFSET;
    bus_limit = bus_base + CPM_RESERVED_BUS;
    create_ioat_domain(path, bus, bus_base, bus_limit, -1, 0, mem64_base, mem64_limit,
-			   DOMAIN_TYPE_CPM0, pci_segment_group);
+			   DOMAIN_TYPE_CPM0, pci_segment_group, NULL);

/* HQM0 */
    mem64_base = mem64_limit + 1;
@@ -108,7 +111,7 @@
    bus_base = sr->BusBase + HQM_BUS_OFFSET;
    bus_limit = bus_base + HQM_RESERVED_BUS;
    create_ioat_domain(path, bus, bus_base, bus_limit, -1, 0, mem64_base, mem64_limit,
-			   DOMAIN_TYPE_HQM0, pci_segment_group);
+			   DOMAIN_TYPE_HQM0, pci_segment_group, NULL);

/* CPM1 (optional) */
    mem64_base = mem64_limit + 1;
@@ -117,7 +120,7 @@
    bus_limit = bus_base + CPM_RESERVED_BUS;
    if (bus_limit <= sr->BusLimit)
    	create_ioat_domain(path, bus, bus_base, bus_limit, -1, 0, mem64_base, mem64_limit,
-				   DOMAIN_TYPE_CPM1, pci_segment_group);
+				   DOMAIN_TYPE_CPM1, pci_segment_group, NULL);

/* HQM1 (optional) */
    mem64_base = mem64_limit + 1;
@@ -126,25 +129,23 @@
    bus_limit = bus_base + HQM_RESERVED_BUS;
    if (bus_limit <= sr->BusLimit)
    	create_ioat_domain(path, bus, bus_base, bus_limit, -1, 0, mem64_base, mem64_limit,
-				   DOMAIN_TYPE_HQM1, pci_segment_group);
+				   DOMAIN_TYPE_HQM1, pci_segment_group, NULL);

/* DINO */
    mem64_base = mem64_limit + 1;
    mem64_limit = sr->PciResourceMem64Limit;
    bus_base = sr->BusBase;
    bus_limit = bus_base;
+	int index = 0;
    struct device *const dev = create_ioat_domain(path, bus, bus_base, bus_limit,
    			sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
-				mem64_base, mem64_limit, DOMAIN_TYPE_DINO, pci_segment_group);
+				mem64_base, mem64_limit, DOMAIN_TYPE_DINO, pci_segment_group,
+				&index);

/* Declare domain reserved MMIO */
    uint64_t reserved_mmio = sr->VtdBarAddress + vtd_probe_bar_size(pcidev_on_root(0, 0));
    if ((reserved_mmio >= sr->PciResourceMem32Base) &&
-	    (reserved_mmio <= sr->PciResourceMem32Limit)) {
-		int index = 0;
-		for (struct resource *res = dev->resource_list; res; res = res->next)
-			index++;
+	    (reserved_mmio <= sr->PciResourceMem32Limit))
    	mmio_range(dev, index, reserved_mmio,
    		sr->PciResourceMem32Limit - reserved_mmio + 1);
-	}
 }