Change in coreboot[master]: mb/google/brya/var/banshee: add the smbus addr for dimm1

[Frank Wu (Code Review)]

Frank Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63622 )

Change subject: mb/google/brya/var/banshee: add the smbus addr for dimm1
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mb/google/brya/var/banshee: add the smbus addr for dimm1

Align the setting with the adlrvp.

BUG=b:213964936
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
The MRC training does not be performed again after rebooting.

Signed-off-by: Frank Wu 
Change-Id: I708d6c3f7976891b1178e43449168090e215d122
---
M src/mainboard/google/brya/variants/banshee/memory.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/63622/1

diff --git a/src/mainboard/google/brya/variants/banshee/memory.c b/src/mainboard/google/brya/variants/banshee/memory.c
index 7371f57..deccf13 100644
--- a/src/mainboard/google/brya/variants/banshee/memory.c
+++ b/src/mainboard/google/brya/variants/banshee/memory.c
@@ -33,5 +33,7 @@
 {
    spd_info->topo = MEM_TOPO_DIMM_MODULE;
    spd_info->smbus[0].addr_dimm[0] = 0x50;
+	spd_info->smbus[0].addr_dimm[1] = 0x51;
    spd_info->smbus[1].addr_dimm[0] = 0x52;
+	spd_info->smbus[1].addr_dimm[1] = 0x53;
 }