Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Matt DeVillier, Zheng Bao, Martin Roth, Fred Reitberger, Felix Held.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69150 )
Change subject: soc/amd/morgana: Add 32M support ......................................................................
Patch Set 6: Code-Review-1
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69150/comment/55eb8161_d6f72a5f PS6, Line 12: s. So we need to convert the : address, or map the upper 16M instead (the easier way UEFI BIOS : does) Why is this easier? I found it easier to get it working in the lower part of the flash.
File src/mainboard/amd/birman/chromeos.fmd:
https://review.coreboot.org/c/coreboot/+/69150/comment/1f3090e8_297f1305 PS6, Line 1: 0xFE000000 This is just wrong. Only 16M gets memory mapped. This is just a hack and the proper way is to let coreboot be aware of the memory map.
https://review.coreboot.org/c/coreboot/+/69150/comment/5b117ad1_d5be4e07 PS6, Line 4: 13M Why so large?
File src/soc/amd/morgana/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/69150/comment/738561c9_c1c3b293 PS6, Line 319: cbfs-files-y += apu/amdfw : apu/amdfw-file := $(obj)/amdfw.rom : apu/amdfw-position := $(MORGANA_FWM_POSITION) : apu/amdfw-type := raw You should still have this option.
https://review.coreboot.org/c/coreboot/+/69150/comment/fa610204_1d72bc7a PS6, Line 135: ifeq ($(CONFIG_COREBOOT_ROMSIZE_KB_32768),y) : PSP_SOFTFUSE_BITS += 14 : endif Why? You could just as well put it in the lower half and change the coreboot memory map. Using the upper half should not be enforced.
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Arthur Heymans (Code Review)