Attention is currently required from: Felix Singer, Raul Rangel, Furquan Shaikh, Angel Pons, Subrata Banik, Kyösti Mälkki, Patrick Rudolph, Lance Zhao, Jason Glenesk, Matt Delco, Marshall Dawson, Tim Wawrzynczak, Felix Held. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57888 )
Change subject: soc/amd/cezanne,soc/intel/common: rework CPPC table generation ......................................................................
Patch Set 12:
(13 comments)
File src/cpu/intel/common/common_init.c:
https://review.coreboot.org/c/coreboot/+/57888/comment/1ab3010a_f07f326c PS12, Line 111: config->regs[CPPC_LOWEST_PERF] = ACPI_REG_MSR(IA32_HWP_CAPABILITIES, 24, 8);
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wontfix
https://review.coreboot.org/c/coreboot/+/57888/comment/2186cae3_f9b3dbe0 PS12, Line 112: config->regs[CPPC_GUARANTEED_PERF] = ACPI_REG_MSR(IA32_HWP_CAPABILITIES, 8, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/bd89b20e_ade812b0 PS12, Line 135: config->regs[CPPC_AUTO_ACTIVITY_WINDOW] = ACPI_REG_MSR(IA32_HWP_REQUEST, 32, 10);
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File src/soc/amd/cezanne/cppc.c:
https://review.coreboot.org/c/coreboot/+/57888/comment/f44beb58_f77c3e90 PS12, Line 18: config->regs[CPPC_HIGHEST_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_HIGHEST_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/09d3fa50_9a11293e PS12, Line 19: config->regs[CPPC_NOMINAL_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_NOMINAL_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/bad64f32_9ec27b60 PS12, Line 20: config->regs[CPPC_LOWEST_NONL_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOW_NON_LIN_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/5874226d_261dace2 PS12, Line 21: config->regs[CPPC_LOWEST_PERF] = ACPI_REG_MSR(MSR_CPPC_CAPABILITY_1, SHIFT_CPPC_CAPABILITY_1_LOWEST_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/14e839e7_d3a67e8b PS12, Line 23: config->regs[CPPC_DESIRED_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_DES_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/ad85a4cf_28369119 PS12, Line 24: config->regs[CPPC_MIN_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MIN_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/d0fe982d_dd7a4044 PS12, Line 25: config->regs[CPPC_MAX_PERF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_MAX_PERF, 8);
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https://review.coreboot.org/c/coreboot/+/57888/comment/043062c0_539408f4 PS12, Line 29: config->regs[CPPC_REF_PERF_COUNTER] = ACPI_REG_MSR(MSR_MAX_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
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https://review.coreboot.org/c/coreboot/+/57888/comment/adc55050_05280896 PS12, Line 30: config->regs[CPPC_DELIVERED_PERF_COUNTER] = ACPI_REG_MSR(MSR_ACTUAL_PERFORMANCE_FREQUENCY_CLOCK_COUNT, 0, 64);
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https://review.coreboot.org/c/coreboot/+/57888/comment/46b180ef_4644ec7a PS12, Line 39: config->regs[CPPC_PERF_PREF] = ACPI_REG_MSR(MSR_CPPC_REQUEST, SHIFT_CPPC_REQUEST_ENERGY_PERF_PREF, 8);
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wontfix