[XS] Change in coreboot[main]: mb/google/brask/var/bujia: Configure Serial IO UARTs Mode

[Shon Wang (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Shon Wang.

Hello Derek Huang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, Varshit Pandya, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83205?usp=email

to look at the new patch set (#5).

Change subject: mb/google/brask/var/bujia: Configure Serial IO UARTs Mode
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mb/google/brask/var/bujia: Configure Serial IO UARTs Mode

This patch configures Serial IO UARTs mode as below.

UART0 and UART1 in PCI mode and keep UART2 disable as per hardware design.

BUG=b:338917836
BRANCH=firmware-brya-14505.B
TEST= USE="-project_all project_bujia" emerge-brask coreboot

Change-Id: I5617331aaf505b97e25a717b145fb70dc53f5a38
Signed-off-by: Shon Wang 
---
M src/mainboard/google/brya/variants/bujia/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/83205/5