Change in coreboot[master]: coreboot_tables: Add PCIe info to coreboot table

[Jianjun Wang (Code Review)]

Attention is currently required from: Shelley Chen, Hung-Te Lin, Nico Huber, Rex-BC Chen, Julius Werner, Arthur Heymans, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63251 )

Change subject: coreboot_tables: Add PCIe info to coreboot table
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Patch Set 16:

(1 comment)

Patchset:

PS9:
> So what do we have now -- is this now a MeidaTek-only struct? How likely are we going to be able to  […]

Hi Shelley,

Do you think if we can use the same structure here?

For Qualcomm platform, the ATU_BASE is 0x40001000 and the MMIO_BASE is 0x40100000 based on this patch:
https://review.coreboot.org/c/coreboot/+/61773/36/src/soc/qualcomm/sc7280/Kc...

Is there any chance for Qualcomm to use ctrl_base = 0x40000000, so we can let atu_base = ctrl_base + 0x1000, mmio_base = ctrl_base + 0x100000, what do you think?