[S] Change in coreboot[master]: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled

[Paul Menzel (Code Review)]

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Jingle Hsu, David Hendricks, Shuo Liu, Nill Ge, Arthur Heymans, Lean Sheng Tan, TangYiwei, Shelly Chang, Tim Chu.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74296 )

Change subject: soc/intel/xeon_sp: Fix very small total memory when CXL is enabled
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Patch Set 2:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74296/comment/8bafeb29_f9e46433 
PS2, Line 12: By default SOC_INTEL_HAS_CXL is enabled for Sapphire Rapids platforms,
Please add a blank line between paragraphs.

https://review.coreboot.org/c/coreboot/+/74296/comment/06cce23e_8dfe7c71 
PS2, Line 13: small total memory issue
Please elaborate.