Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48827 )
Change subject: soc/intel/common: Fix XHCI elog driver ......................................................................
soc/intel/common: Fix XHCI elog driver
Commit 56fcfb5 misused the PCH_DEVFNs passed to the XHCI elog driver, by passing them directly to pci_s_read_config32. This is incorrect, as it is the wrong PCI devfn encoding to pass to that function.
BUG=b:175996770 TEST=abuild
Change-Id: Id7c146c1f50ee64a725bd50f9f11a7f159013a2b Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/common/block/xhci/elog.c 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/48827/1
diff --git a/src/soc/intel/common/block/xhci/elog.c b/src/soc/intel/common/block/xhci/elog.c index fb59897..e6a1c0f 100644 --- a/src/soc/intel/common/block/xhci/elog.c +++ b/src/soc/intel/common/block/xhci/elog.c @@ -105,8 +105,9 @@
for (i = 0; i < wake_info_count; ++i) { /* Assumes BAR0 is MBAR */ - mmio_base = pci_s_read_config32(wake_info[i].xhci_dev, - PCI_BASE_ADDRESS_0); + pci_devfn_t devfn = PCI_DEV(0, PCI_SLOT(wake_info[i].xhci_dev), + PCI_FUNC(wake_info[i].xhci_dev)); + mmio_base = pci_s_read_config32(devfn, PCI_BASE_ADDRESS_0); mmio_base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; usb_info = soc_get_xhci_usb_info(wake_info[i].xhci_dev);
Sukumar Ghorai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48827 )
Change subject: soc/intel/common: Fix XHCI elog driver ......................................................................
Patch Set 1: Code-Review+1
Verified.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48827 )
Change subject: soc/intel/common: Fix XHCI elog driver ......................................................................
Patch Set 1: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48827 )
Change subject: soc/intel/common: Fix XHCI elog driver ......................................................................
Patch Set 1:
Submitting early because without this, s0ix resume from usb hid devices is broken
Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48827 )
Change subject: soc/intel/common: Fix XHCI elog driver ......................................................................
soc/intel/common: Fix XHCI elog driver
Commit 56fcfb5 misused the PCH_DEVFNs passed to the XHCI elog driver, by passing them directly to pci_s_read_config32. This is incorrect, as it is the wrong PCI devfn encoding to pass to that function.
BUG=b:175996770 TEST=abuild
Change-Id: Id7c146c1f50ee64a725bd50f9f11a7f159013a2b Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/48827 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sukumar Ghorai sukumar.ghorai@intel.com Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/xhci/elog.c 1 file changed, 3 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Sukumar Ghorai: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/common/block/xhci/elog.c b/src/soc/intel/common/block/xhci/elog.c index fb59897..e6a1c0f 100644 --- a/src/soc/intel/common/block/xhci/elog.c +++ b/src/soc/intel/common/block/xhci/elog.c @@ -105,8 +105,9 @@
for (i = 0; i < wake_info_count; ++i) { /* Assumes BAR0 is MBAR */ - mmio_base = pci_s_read_config32(wake_info[i].xhci_dev, - PCI_BASE_ADDRESS_0); + pci_devfn_t devfn = PCI_DEV(0, PCI_SLOT(wake_info[i].xhci_dev), + PCI_FUNC(wake_info[i].xhci_dev)); + mmio_base = pci_s_read_config32(devfn, PCI_BASE_ADDRESS_0); mmio_base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; usb_info = soc_get_xhci_usb_info(wake_info[i].xhci_dev);
-
Furquan Shaikh (Code Review) -
Sukumar Ghorai (Code Review)
-
Tim Wawrzynczak (Code Review)