[L] Change in coreboot[main]: soc/intel/xeon_sp: Share save_dimm_info among Xeon-SP SoCs

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83325?usp=email )

Change subject: soc/intel/xeon_sp: Share save_dimm_info among Xeon-SP SoCs
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Patch Set 6:

(1 comment)

File src/soc/intel/xeon_sp/romstage.c:

https://review.coreboot.org/c/coreboot/+/83325/comment/09312253_d3d1b474?usp... :
PS3, Line 43: #if CONFIG(SOC_INTEL_SKYLAKE_SP)
> It is because SKX doesn't support the HOB context needed to obtain the DIMM info, but the SKX will s […]

I suppose I got your points, done :)