New patch to review for coreboot: d04fa86 Jetway NF81-T56N-LF: Bump size of ROM found on board.
Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4811
-gerrit
commit d04fa865d740066dc2e386894263041468715688 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sun Jan 26 11:45:30 2014 +1100
Jetway NF81-T56N-LF: Bump size of ROM found on board.
Change-Id: Ibce34ab576d7db8586a6ec8f9b2460268e0e1878 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/amd/persimmon/platform_cfg.h | 8 ++++++-- src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h | 8 ++++++-- 2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h index 0578e27..25ebb21 100644 --- a/src/mainboard/amd/persimmon/platform_cfg.h +++ b/src/mainboard/amd/persimmon/platform_cfg.h @@ -26,11 +26,13 @@ * @def BIOS_SIZE_2M * @def BIOS_SIZE_4M * @def BIOS_SIZE_8M + * @def BIOS_SIZE_16M */ #define BIOS_SIZE_1M 0 #define BIOS_SIZE_2M 1 #define BIOS_SIZE_4M 3 #define BIOS_SIZE_8M 7 +#define BIOS_SIZE_16M 15
/* In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and @@ -45,8 +47,10 @@ #define BIOS_SIZE BIOS_SIZE_4M #elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 #define BIOS_SIZE BIOS_SIZE_8M +#elif CONFIG_COREBOOT_ROMSIZE_KB_16484 == 1 + #define BIOS_SIZE BIOS_SIZE_16M #endif -#endif +#endif /* BIOS_SIZE */
/** * @def SPREAD_SPECTRUM @@ -270,4 +274,4 @@ static const CODECTBLLIST codec_tablelist[] = */ #define FADT_PM_PROFILE 1
-#endif +#endif /* _PLATFORM_CFG_H_ */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h index a8ea3d6..c4bc288 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h +++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h @@ -27,11 +27,13 @@ * @def BIOS_SIZE_2M * @def BIOS_SIZE_4M * @def BIOS_SIZE_8M + * @def BIOS_SIZE_16M */ #define BIOS_SIZE_1M 0 #define BIOS_SIZE_2M 1 #define BIOS_SIZE_4M 3 #define BIOS_SIZE_8M 7 +#define BIOS_SIZE_16M 15
/* In SB800, default ROM size is 1M Bytes, if your platform ROM * bigger than 1M you have to set the ROM size outside CIMx module and @@ -46,8 +48,10 @@ #define BIOS_SIZE BIOS_SIZE_4M #elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1 #define BIOS_SIZE BIOS_SIZE_8M +#elif CONFIG_COREBOOT_ROMSIZE_KB_16484 == 1 + #define BIOS_SIZE BIOS_SIZE_16M #endif -#endif +#endif /* BIOS_SIZE */
/** * @def SPREAD_SPECTRUM @@ -273,4 +277,4 @@ static const CODECTBLLIST codec_tablelist[] = */ #define FADT_PM_PROFILE 1
-#endif +#endif /* _PLATFORM_CFG_H_ */
-
Edward O'Callaghan