Attention is currently required from: Raul Rangel, Paul Menzel, Tim Van Patten, Karthik Ramasubramanian, Mark Hasemeyer.
Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74106 )
Change subject: mb/google/myst: Add ACPI configuration for USB ports ......................................................................
Patch Set 25:
(2 comments)
File src/mainboard/google/myst/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/74106/comment/ed2dc637_d59509f8 PS25, Line 24: chip drivers/usb/acpi : register "desc" = ""USB3 Type-C Port C0 (MLB)"" : register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" : register "group" = "ACPI_PLD_GROUP(1, 1)" : device ref usb3_port0 on end : end : chip drivers/usb/acpi : register "desc" = ""USB3 Type-C Port C1 (MLB)"" : register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" : register "group" = "ACPI_PLD_GROUP(1, 2)" : device ref usb3_port1 on end : end : chip drivers/usb/acpi : register "desc" = ""USB2 Type-C Port C0 (MLB)"" : register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" : register "group" = "ACPI_PLD_GROUP(1, 1)" : device ref usb2_port0 on end : end : chip drivers/usb/acpi : register "desc" = ""USB2 Type-C Port C1 (MLB)"" : register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" : register "group" = "ACPI_PLD_GROUP(1, 2)" : device ref usb2_port1 on end : end
Also it is either USB-A1 port or WWAN. […]
Done
https://review.coreboot.org/c/coreboot/+/74106/comment/8ae55a79_407b34d0 PS25, Line 102: register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
Use custom_pld. Please refer to skyrim or other google mainboards. Same for all user-visible ports.
Done
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Jon Murphy (Code Review)