[XS] Change in coreboot[main]: soc/intel/jasperlake: add support for RP LTR mechanism - coreboot-gerrit

31 Oct 2024


      Attention is currently required from: Curtis Chen, David Ruth, Jamie Chen, Lawrence Chang, Nick Vaccaro, Simon Yang.
Subrata Banik has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/84866?usp=email )
Change subject: soc/intel/jasperlake: add support for RP LTR mechanism
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Patch Set 3: Code-Review+2
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f
Gerrit-Change-Number: 84866
Gerrit-PatchSet: 3
Gerrit-Owner: Lawrence Chang lawrence.chang@intel.com
Gerrit-Reviewer: Curtis Chen curtis.chen@intel.com
Gerrit-Reviewer: David Ruth druth@chromium.org
Gerrit-Reviewer: David Ruth druth@google.com
Gerrit-Reviewer: Jamie Chen jamie.chen@intel.com
Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com
Gerrit-Reviewer: Simon Yang simon1.yang@intel.com
Gerrit-Reviewer: Subrata Banik subratabanik@google.com
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Gerrit-Attention: Jamie Chen jamie.chen@intel.com
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Gerrit-Attention: David Ruth druth@google.com
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Gerrit-Comment-Date: Thu, 31 Oct 2024 07:56:24 +0000
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