Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83490?usp=email )
Change subject: device/pci_ids: Add new Intel PTL device IDs for DID0 ......................................................................
device/pci_ids: Add new Intel PTL device IDs for DID0
This patch adds new DID0 PCI device IDs for Intel PTL-U and PTL-H.
Additionally, updates the System Agent driver's `systemagent_ids` list to include these new IDs.
Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2
BUG=b:347669091 TEST=Able to build google/fatcat.
Change-Id: Ie4d77eb489e16d18b996fdda3216e1275083d7e7 Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/83490 Reviewed-by: Eric Lai ericllai@google.com Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h M src/soc/intel/common/block/systemagent/systemagent.c 2 files changed, 6 insertions(+), 2 deletions(-)
Approvals: Eric Lai: Looks good to me, approved Angel Pons: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 7c3b55e..2875dff 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4336,7 +4336,9 @@ #define PCI_DID_INTEL_RPL_P_ID_8 0xa716 #define PCI_DID_INTEL_LNL_M_ID 0x6400 #define PCI_DID_INTEL_LNL_M_ID_1 0x6410 -#define PCI_DID_INTEL_PTL_ID 0xb001 +#define PCI_DID_INTEL_PTL_U_ID_1 0xb000 +#define PCI_DID_INTEL_PTL_H_ID_1 0xb001 +#define PCI_DID_INTEL_PTL_H_ID_2 0xb002
/* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index b2ae3cd..48dbbf1 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -413,7 +413,9 @@ };
static const unsigned short systemagent_ids[] = { - PCI_DID_INTEL_PTL_ID, + PCI_DID_INTEL_PTL_U_ID_1, + PCI_DID_INTEL_PTL_H_ID_1, + PCI_DID_INTEL_PTL_H_ID_2, PCI_DID_INTEL_LNL_M_ID, PCI_DID_INTEL_LNL_M_ID_1, PCI_DID_INTEL_MTL_M_ID,