yuchi.chen@intel.com has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84334?usp=email )
Change subject: use CONFIG_SMM_TSEG_SIZE ......................................................................
use CONFIG_SMM_TSEG_SIZE
Change-Id: Ic489ebd871135bd72714b59fc1b4fed2f38e9c52 Signed-off-by: Yuchi Chen yuchi.chen@intel.com --- M src/soc/intel/snowridge/Kconfig 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/84334/1
diff --git a/src/soc/intel/snowridge/Kconfig b/src/soc/intel/snowridge/Kconfig index 3ce9a10..9ebf8c9 100644 --- a/src/soc/intel/snowridge/Kconfig +++ b/src/soc/intel/snowridge/Kconfig @@ -251,6 +251,12 @@ help This option allows you to select MMIO Base Address of sideband bus.
+config SMM_TSEG_SIZE + hex + default 0x8000000 + help + Default TSEG size. The value should be consistent with PcdTsegSize. + config IED_REGION_SIZE hex default 0x400000