HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44173 )
Change subject: src: Use space after 'if', 'for' ......................................................................
src: Use space after 'if', 'for'
Change-Id: I5d3a5ede47aefc7cc2ee330f8a0bcded16138764 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/device/oprom/realmode/x86.c M src/mainboard/google/peach_pit/mainboard.c M src/mainboard/google/peach_pit/romstage.c M src/mainboard/roda/rk886ex/m3885.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/soc/intel/skylake/sd.c 7 files changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/44173/1
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c index 5215934..d230d5c 100644 --- a/src/device/oprom/realmode/x86.c +++ b/src/device/oprom/realmode/x86.c @@ -130,7 +130,7 @@ { /* If the mainboard_interrupt_handler isn't called first. */ - if(!intXX_handler[i]) + if (!intXX_handler[i]) { /* Now set the default functions that are actually * needed to initialize the option roms. This is diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c index 8b54b99..33541b2 100644 --- a/src/mainboard/google/peach_pit/mainboard.c +++ b/src/mainboard/google/peach_pit/mainboard.c @@ -254,7 +254,7 @@ * we're out of here. * If it's not ready after a second, then we're in big trouble. */ - for(i = 0; i < 1000; i++){ + for (i = 0; i < 1000; i++){ if (gpio_get_value(dp_hpd)) break; mdelay(1); diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c index d99db80..53fdfba 100644 --- a/src/mainboard/google/peach_pit/romstage.c +++ b/src/mainboard/google/peach_pit/romstage.c @@ -129,13 +129,13 @@ unsigned long *l = (void *)0x40000000; int bad = 0; unsigned long i; - for(i = 0; i < 256*1048576; i++){ + for (i = 0; i < 256*1048576; i++){ if (! (i%1048576)) printk(BIOS_SPEW, "%lu ...", i); l[i] = 0xffffffff - i; }
- for(i = 0; i < 256*1048576; i++){ + for (i = 0; i < 256*1048576; i++){ if (! (i%1048576)) printk(BIOS_SPEW, "%lu ...", i); if (l[i] != (0xffffffff - i)){ @@ -177,7 +177,7 @@ }
- for(i = 0; i < amt; i += 4){ + for (i = 0; i < amt; i += 4){ if (rdev_readat(boot_dev, &in, i, 4) < 4) { printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i); return; diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c index 6756e0e..59dd575 100644 --- a/src/mainboard/roda/rk886ex/m3885.c +++ b/src/mainboard/roda/rk886ex/m3885.c @@ -251,7 +251,7 @@ maxvars = m3885_get_variable(0x00); printk(BIOS_DEBUG, "M388x has %d variables in original bank.\n", maxvars); for (i = 0; i < ARRAY_SIZE(variables); i+=3) { - if(variables[i + 0] > maxvars) + if (variables[i + 0] > maxvars) continue; reg8 = m3885_get_variable(variables[i + 0]); reg8 &= ~(variables[i + 1]); diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 52166ed..489340a 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -498,7 +498,7 @@ FOR_EACH_BYTELANE(lane) { saved_dqs_center[channel][lane] /= RT_LOOPS; while (saved_dqs_center[channel][lane]--) { - if(rt_increment_dqs(&s->rt_dqs[channel][lane]) + if (rt_increment_dqs(&s->rt_dqs[channel][lane]) == CB_ERR) /* Should never happen */ printk(BIOS_ERR, diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 332af32..57d5ef4 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -2166,7 +2166,7 @@
if (!fast_boot) { if (s->selected_timings.mem_clk > MEM_CLOCK_667MHz) { - if(do_write_training(s)) + if (do_write_training(s)) die("DQ write training failed!"); } if (do_read_training(s)) diff --git a/src/soc/intel/skylake/sd.c b/src/soc/intel/skylake/sd.c index 1f40d98..ba56182 100644 --- a/src/soc/intel/skylake/sd.c +++ b/src/soc/intel/skylake/sd.c @@ -8,7 +8,7 @@ config_t *config = config_of(dev);
/* Nothing to write if GPIO is not set in devicetree */ - if(!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0]) + if (!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0]) return -1;
if (config->sdcard_cd_gpio_default) {
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44173 )
Change subject: src: Use space after 'if', 'for' ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... File src/mainboard/google/peach_pit/mainboard.c:
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... PS1, Line 257: for (i = 0; i < 1000; i++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... File src/mainboard/google/peach_pit/romstage.c:
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... PS1, Line 132: for (i = 0; i < 256*1048576; i++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... PS1, Line 138: for (i = 0; i < 256*1048576; i++){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/44173/1/src/mainboard/google/peach_... PS1, Line 180: for (i = 0; i < amt; i += 4){ space required before the open brace '{'
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44173 )
Change subject: src: Use space after 'if', 'for' ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44173 )
Change subject: src: Use space after 'if', 'for' ......................................................................
src: Use space after 'if', 'for'
Change-Id: I5d3a5ede47aefc7cc2ee330f8a0bcded16138764 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/44173 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/device/oprom/realmode/x86.c M src/mainboard/google/peach_pit/mainboard.c M src/mainboard/google/peach_pit/romstage.c M src/mainboard/roda/rk886ex/m3885.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/soc/intel/skylake/sd.c 7 files changed, 9 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c index 5215934..d230d5c 100644 --- a/src/device/oprom/realmode/x86.c +++ b/src/device/oprom/realmode/x86.c @@ -130,7 +130,7 @@ { /* If the mainboard_interrupt_handler isn't called first. */ - if(!intXX_handler[i]) + if (!intXX_handler[i]) { /* Now set the default functions that are actually * needed to initialize the option roms. This is diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c index 8b54b99..33541b2 100644 --- a/src/mainboard/google/peach_pit/mainboard.c +++ b/src/mainboard/google/peach_pit/mainboard.c @@ -254,7 +254,7 @@ * we're out of here. * If it's not ready after a second, then we're in big trouble. */ - for(i = 0; i < 1000; i++){ + for (i = 0; i < 1000; i++){ if (gpio_get_value(dp_hpd)) break; mdelay(1); diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c index d99db80..53fdfba 100644 --- a/src/mainboard/google/peach_pit/romstage.c +++ b/src/mainboard/google/peach_pit/romstage.c @@ -129,13 +129,13 @@ unsigned long *l = (void *)0x40000000; int bad = 0; unsigned long i; - for(i = 0; i < 256*1048576; i++){ + for (i = 0; i < 256*1048576; i++){ if (! (i%1048576)) printk(BIOS_SPEW, "%lu ...", i); l[i] = 0xffffffff - i; }
- for(i = 0; i < 256*1048576; i++){ + for (i = 0; i < 256*1048576; i++){ if (! (i%1048576)) printk(BIOS_SPEW, "%lu ...", i); if (l[i] != (0xffffffff - i)){ @@ -177,7 +177,7 @@ }
- for(i = 0; i < amt; i += 4){ + for (i = 0; i < amt; i += 4){ if (rdev_readat(boot_dev, &in, i, 4) < 4) { printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i); return; diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c index 6756e0e..59dd575 100644 --- a/src/mainboard/roda/rk886ex/m3885.c +++ b/src/mainboard/roda/rk886ex/m3885.c @@ -251,7 +251,7 @@ maxvars = m3885_get_variable(0x00); printk(BIOS_DEBUG, "M388x has %d variables in original bank.\n", maxvars); for (i = 0; i < ARRAY_SIZE(variables); i+=3) { - if(variables[i + 0] > maxvars) + if (variables[i + 0] > maxvars) continue; reg8 = m3885_get_variable(variables[i + 0]); reg8 &= ~(variables[i + 1]); diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 52166ed..489340a 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -498,7 +498,7 @@ FOR_EACH_BYTELANE(lane) { saved_dqs_center[channel][lane] /= RT_LOOPS; while (saved_dqs_center[channel][lane]--) { - if(rt_increment_dqs(&s->rt_dqs[channel][lane]) + if (rt_increment_dqs(&s->rt_dqs[channel][lane]) == CB_ERR) /* Should never happen */ printk(BIOS_ERR, diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 1aa7e39..7c12ee0 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -2166,7 +2166,7 @@
if (!fast_boot) { if (s->selected_timings.mem_clk > MEM_CLOCK_667MHz) { - if(do_write_training(s)) + if (do_write_training(s)) die("DQ write training failed!"); } if (do_read_training(s)) diff --git a/src/soc/intel/skylake/sd.c b/src/soc/intel/skylake/sd.c index 1f40d98..ba56182 100644 --- a/src/soc/intel/skylake/sd.c +++ b/src/soc/intel/skylake/sd.c @@ -8,7 +8,7 @@ config_t *config = config_of(dev);
/* Nothing to write if GPIO is not set in devicetree */ - if(!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0]) + if (!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0]) return -1;
if (config->sdcard_cd_gpio_default) {
-
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build bot (Jenkins) (Code Review)
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HAOUAS Elyes (Code Review)