Change in ...coreboot[master]: sdm845: Add QCLib to RomStage to perform DDR init

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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25208 )

Change subject: sdm845: Add QCLib to RomStage to perform DDR init
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Patch Set 70:

(1 comment)

https://review.coreboot.org/#/c/25208/70/src/soc/qualcomm/sdm845/qclib_execu... 
File src/soc/qualcomm/sdm845/qclib_execute.c:

https://review.coreboot.org/#/c/25208/70/src/soc/qualcomm/sdm845/qclib_execu... 
PS70, Line 164: 	printk(BIOS_INFO, "Board Rev(0x%d)\n", board_id());
Prefixing 0x with decimal output is defective