Paul Kocialkowski (contact@paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11698
-gerrit
commit bc91a54bd5198da1fe399d88546e50f059ed4b42 Author: Paul Kocialkowski contact@paulk.fr Date: Tue Sep 22 22:16:33 2015 +0200
armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write
Some registers only allow word-sized or half-word-sized operations and will cause a data fault when accessed with byte-sized operations. However, the compiler may or may not break such an operation into smaller (byte-sized) chunks. Thus, we need to reliably perform word-sized operations for 32 bit read/write and half-word-sized operations for 16 bit read/write.
This is particularly the case on the rk3288 SRAM registers, where the watchdog tombstone is stored. Moving to GCC 5.2.0 introduced a change of strategy in the compiler, where a 32 bit read would be broken into byte-sized chunks, which caused a data fault when accessing the watchdog tombstone register.
The definitions for byte-sized memory operations are also adapted to stay consistent with the rest.
Change-Id: I1fb3fc139e0a813acf9d70f14386a9603c9f9ede Signed-off-by: Paul Kocialkowski contact@paulk.fr --- src/arch/arm/include/armv7/arch/io.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/src/arch/arm/include/armv7/arch/io.h b/src/arch/arm/include/armv7/arch/io.h index 9d06003..2901ac2 100644 --- a/src/arch/arm/include/armv7/arch/io.h +++ b/src/arch/arm/include/armv7/arch/io.h @@ -30,39 +30,39 @@ static inline uint8_t read8(const void *addr) { dmb(); - return *(volatile uint8_t *)addr; + return *(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t)); }
static inline uint16_t read16(const void *addr) { dmb(); - return *(volatile uint16_t *)addr; + return *(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t)); }
static inline uint32_t read32(const void *addr) { dmb(); - return *(volatile uint32_t *)addr; + return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t)); }
static inline void write8(void *addr, uint8_t val) { dmb(); - *(volatile uint8_t *)addr = val; + *(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t)) = val; dmb(); }
static inline void write16(void *addr, uint16_t val) { dmb(); - *(volatile uint16_t *)addr = val; + *(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t)) = val; dmb(); }
static inline void write32(void *addr, uint32_t val) { dmb(); - *(volatile uint32_t *)addr = val; + *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t)) = val; dmb(); }