Change in ...coreboot[master]: soc/intel/cannonlake: Fix GPIO reporting

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30112

Change subject: soc/intel/cannonlake: Fix GPIO reporting
......................................................................

soc/intel/cannonlake: Fix GPIO reporting

The kernel GPIO driver only expects GPIO communities 0, 1, and 4 to
be exported in the _CRS and it will not work correctly if the other
communities are exported.

Additionally one of the pin offset values was incorrect in GPIO
community 1.  This doesn't have any specific failure mode but it was
found when auditing the GPIO code.

BUG=b:120686247
TEST=check /sys/kernel/debug/pinctrl/INT34BB:00/pins to ensure that
pins >= 198 are not reading all zeros for the pin config registers.

Change-Id: Ie1a2f3b9f9f4b24a9fc57e468dee50e99753912f
Signed-off-by: Duncan Laurie 
---
M src/soc/intel/cannonlake/acpi/gpio.asl
M src/soc/intel/cannonlake/gpio.c
2 files changed, 1 insertion(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/30112/1

diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl
index 8a990b3..bf4fc5e 100644
--- a/src/soc/intel/cannonlake/acpi/gpio.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio.asl
@@ -28,8 +28,6 @@
    {
    	Memory32Fixed (ReadWrite, 0, 0, COM0)
    	Memory32Fixed (ReadWrite, 0, 0, COM1)
-		Memory32Fixed (ReadWrite, 0, 0, COM2)
-		Memory32Fixed (ReadWrite, 0, 0, COM3)
    	Memory32Fixed (ReadWrite, 0, 0, COM4)
    	Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
    		{ GPIO_IRQ14 }
@@ -49,19 +47,6 @@
    	Store (^^PCRB (PID_GPIOCOM1), BAS1)
    	Store (GPIO_BASE_SIZE, LEN1)

-		/* GPIO Community 2 */
-		CreateDWordField (^RBUF, ^COM2._BAS, BAS2)
-		CreateDWordField (^RBUF, ^COM2._LEN, LEN2)
-		Store (^^PCRB (PID_GPIOCOM2), BAS2)
-		Store (GPIO_BASE_SIZE, LEN2)
-
-		/* GPIO Community 3 */
-		CreateDWordField (^RBUF, ^COM3._BAS, BAS3)
-		CreateDWordField (^RBUF, ^COM3._LEN, LEN3)
-		Store (^^PCRB (PID_GPIOCOM3), BAS3)
-		Store (GPIO_BASE_SIZE, LEN3)
-
-
    	/* GPIO Community 4 */
    	CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
    	CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
diff --git a/src/soc/intel/cannonlake/gpio.c b/src/soc/intel/cannonlake/gpio.c
index 0befba0..2705bcf 100644
--- a/src/soc/intel/cannonlake/gpio.c
+++ b/src/soc/intel/cannonlake/gpio.c
@@ -43,7 +43,7 @@
    INTEL_GPP(GPP_D0, GPP_D0, GPIO_RSVD_12),	/* GPP_D */
    INTEL_GPP(GPP_D0, GPP_F0, GPP_F23),		/* GPP_F */
    INTEL_GPP(GPP_D0, GPP_H0, GPP_H23),		/* GPP_H */
-	INTEL_GPP(GPP_D0, GPIO_RSVD_12, GPIO_RSVD_52),	/* VGPIO */
+	INTEL_GPP(GPP_D0, GPIO_RSVD_13, GPIO_RSVD_52),	/* VGPIO */
 };

static const struct pad_group cnl_community2_groups[] = {