Change in coreboot[master]: soc/medaitek/mt8195: adjust USB phy shift value - coreboot-gerrit

23 Dec 2021


      Attention is currently required from: Tianping Fang, Rex-BC Chen, Yu-Ping Wu.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60312 )
Change subject: soc/medaitek/mt8195: adjust USB phy shift value
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Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60312/comment/db7621c9_ac3b678f 
PS3, Line 9: a
an
https://review.coreboot.org/c/coreboot/+/60312/comment/6c46ae7a_ae481a4b 
PS3, Line 10: MT8195
can you explain why this is not a problem for 8183 and 8192? silicon design issue or?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I43cb6c1c795dd181d6eba7f3bc52e4eb1a602081
Gerrit-Change-Number: 60312
Gerrit-PatchSet: 3
Gerrit-Owner: Rex-BC Chen rex-bc.chen@mediatek.com
Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org
Gerrit-Reviewer: Rex-BC Chen rex-bc.chen@mediatek.com
Gerrit-Reviewer: Tianping Fang tianping.fang@mediatek.corp-partner.google.com
Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com
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