Pablo Stebler has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb 8 files changed, 413 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/1
diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig index c4cd3a4..bda7656 100644 --- a/src/mainboard/hp/snb_ivb_laptops/Kconfig +++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig @@ -22,6 +22,7 @@ string default "2570p" if BOARD_HP_2570P default "2760p" if BOARD_HP_2760P + default "6360b" if BOARD_HP_6360B default "8460p" if BOARD_HP_8460P default "8470p" if BOARD_HP_8470P default "8770w" if BOARD_HP_8770W @@ -32,6 +33,7 @@ string default "EliteBook 2570p" if BOARD_HP_2570P default "EliteBook 2760p" if BOARD_HP_2760P + default "ProBook 6360b" if BOARD_HP_6360B default "EliteBook 8460p" if BOARD_HP_8460P default "EliteBook 8470p" if BOARD_HP_8470P default "EliteBook 8770w" if BOARD_HP_8770W @@ -60,6 +62,7 @@ int default 2 if BOARD_HP_2570P default 1 if BOARD_HP_2760P + default 1 if BOARD_HP_6360B default 1 if BOARD_HP_8460P default 2 if BOARD_HP_8470P default 2 if BOARD_HP_8770W diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name index c01555f..a84d897 100644 --- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name +++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name @@ -22,6 +22,20 @@ select MAINBOARD_USES_IFD_GBE_REGION select SOUTHBRIDGE_INTEL_BD82X6X
+config BOARD_HP_6360B + bool "ProBook 6360b" + + select BOARD_HP_SNB_IVB_LAPTOPS + select BOARD_ROMSIZE_KB_4096 + select GFX_GMA_PANEL_1_ON_LVDS + select INTEL_INT15 + select MAINBOARD_HAS_LIBGFXINIT + select MAINBOARD_HAS_LPC_TPM + select MAINBOARD_HAS_TPM1 + select MAINBOARD_USES_IFD_GBE_REGION + select SOUTHBRIDGE_INTEL_BD82X6X + select SUPERIO_SMSC_LPC47N217 + config BOARD_HP_8460P bool "EliteBook 8460p"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt new file mode 100644 index 0000000..53ac824 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt @@ -0,0 +1,7 @@ +Category: laptop +Board URL: https://support.hp.com/us-en/product/hp-probook-6360b-notebook-pc/5045581 +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: n +Release year: 2011 diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c new file mode 100644 index 0000000..9524301 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <bootblock_common.h> +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <superio/smsc/lpc47n217/lpc47n217.h> +#include <ec/hp/kbc1126/ec.h> + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* left front */ + { 1, 1, 0 }, /* left rear, debug */ + { 1, 1, 1 }, /* eSATA */ + { 1, 1, 1 }, /* webcam */ + { 1, 0, 2 }, + { 1, 0, 2 }, /* bluetooth */ + { 0, 0, 3 }, + { 0, 0, 3 }, + { 1, 1, 4 }, /* fingerprint reader */ + { 1, 1, 4 }, /* WWAN */ + { 1, 0, 5 }, /* right */ + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads new file mode 100644 index 0000000..3df1e37 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads @@ -0,0 +1,22 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + DP2, + DP3, + HDMI1, + HDMI2, + HDMI3, + Analog, + LVDS, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c new file mode 100644 index 0000000..c281dcd --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c @@ -0,0 +1,225 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_GPIO, + .gpio3 = GPIO_MODE_GPIO, + .gpio4 = GPIO_MODE_GPIO, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_GPIO, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_GPIO, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_OUTPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio2 = GPIO_DIR_INPUT, + .gpio3 = GPIO_DIR_INPUT, + .gpio4 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio10 = GPIO_DIR_INPUT, + .gpio11 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_INPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_OUTPUT, + .gpio23 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio0 = GPIO_LEVEL_LOW, + .gpio11 = GPIO_LEVEL_LOW, + .gpio17 = GPIO_LEVEL_HIGH, + .gpio22 = GPIO_LEVEL_HIGH, + .gpio24 = GPIO_LEVEL_HIGH, + .gpio27 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, + .gpio30 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio1 = GPIO_INVERT, + .gpio3 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio7 = GPIO_INVERT, + .gpio10 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, + .gpio14 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_NATIVE, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_NATIVE, + .gpio44 = GPIO_MODE_GPIO, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_GPIO, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_GPIO, + .gpio51 = GPIO_MODE_GPIO, + .gpio52 = GPIO_MODE_GPIO, + .gpio53 = GPIO_MODE_GPIO, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_OUTPUT, + .gpio36 = GPIO_DIR_OUTPUT, + .gpio37 = GPIO_DIR_OUTPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio44 = GPIO_DIR_INPUT, + .gpio46 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_OUTPUT, + .gpio50 = GPIO_DIR_INPUT, + .gpio51 = GPIO_DIR_INPUT, + .gpio52 = GPIO_DIR_INPUT, + .gpio53 = GPIO_DIR_OUTPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio55 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_OUTPUT, + .gpio60 = GPIO_DIR_OUTPUT, + .gpio61 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio33 = GPIO_LEVEL_LOW, + .gpio35 = GPIO_LEVEL_LOW, + .gpio36 = GPIO_LEVEL_LOW, + .gpio37 = GPIO_LEVEL_LOW, + .gpio49 = GPIO_LEVEL_LOW, + .gpio53 = GPIO_LEVEL_HIGH, + .gpio57 = GPIO_LEVEL_HIGH, + .gpio60 = GPIO_LEVEL_HIGH, + .gpio61 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_GPIO, + .gpio74 = GPIO_MODE_GPIO, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_OUTPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_OUTPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_OUTPUT, + .gpio73 = GPIO_DIR_OUTPUT, + .gpio74 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio68 = GPIO_LEVEL_HIGH, + .gpio70 = GPIO_LEVEL_HIGH, + .gpio71 = GPIO_LEVEL_HIGH, + .gpio72 = GPIO_LEVEL_LOW, + .gpio73 = GPIO_LEVEL_HIGH, + .gpio74 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c new file mode 100644 index 0000000..40de8bc --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + 0x111d7605, /* Codec Vendor / Device ID: IDT */ + 0x103c1620, /* Subsystem ID */ + 11, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x103c1620), + AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x0b, 0x0421401f), + AZALIA_PIN_CFG(0, 0x0c, 0x04a11020), + AZALIA_PIN_CFG(0, 0x0d, 0x90170110), + AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x10, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x11, 0x90a60130), + AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x20, 0x40f000f0), + + 0x11c11040, /* Codec Vendor / Device ID: LSI */ + 0x103c3066, /* Subsystem ID */ + 1, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(1, 0x103c3066), + + 0x80862805, /* Codec Vendor / Device ID: Intel */ + 0x80860101, /* Subsystem ID */ + 4, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(3, 0x80860101), + AZALIA_PIN_CFG(3, 0x05, 0x18560010), + AZALIA_PIN_CFG(3, 0x06, 0x18560020), + AZALIA_PIN_CFG(3, 0x07, 0x18560030), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb new file mode 100644 index 0000000..6b0378e --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip northbridge/intel/sandybridge + register "gpu_cpu_backlight" = "0x0000014a" + + device domain 0 on + subsystemid 0x103c 0x161c inherit + + device pci 01.0 off end # PEG + device pci 02.0 on end # iGPU + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "gen1_dec" = "0x007c0201" + register "gen2_dec" = "0x000c0101" + register "gen3_dec" = "0x00fcfe01" + register "gen4_dec" = "0x000402e9" + register "gpi6_routing" = "2" + register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" + # HDD(0), ODD(1) + register "sata_port_map" = "0x3b" + + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on # PCIe Port #2, ExpressCard + smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort" + "ExpressCard Slot" "SlotDataBusWidth1X" + end + device pci 1c.2 on end # PCIe Port #3, SD/MMC and FireWire + device pci 1c.3 on # PCIe Port #4, WLAN + smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO" + "SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X" + end + device pci 1c.4 off end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 on end # PCIe Port #7, WWAN + device pci 1c.7 off end # PCIe Port #8 + device pci 1f.0 on + chip ec/hp/kbc1126 + register "ec_data_port" = "0x60" + register "ec_cmd_port" = "0x64" + register "ec_ctrl_reg" = "0xca" + register "ec_fan_ctrl_value" = "0x6e" + device pnp ff.1 off end + end + chip superio/smsc/lpc47n217 + device pnp 4e.3 on # Parallel + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 4e.4 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 4e.5 off end # COM2 + end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end + end + end +end
Pablo Stebler has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb 8 files changed, 413 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 2:
(17 comments)
There are no schematics, so I can't verify everything. Hence, dumping settings while running the vendor firmware and then using autoport would help with at least the PCH GPIO settings and Azalia verbs.
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@8 PS2, Line 8: Please mention how you did this. Looks like it was copied from 8460p and changed a bit?
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@27 PS2, Line 27: TPM Does SeaBIOS show any options to configure the TPM?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 65: default 1 if BOARD_HP_6360B Is this tested?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 25: BOARD_HP_6360B minor: Since this is a ProBook and not an EliteBook, I would not use the same Kconfig symbol style to avoid confusion. Instead, I'd use `BOARD_HP_PROBOOK_6360B`
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 37: SUPERIO_SMSC_LPC47N217 Is this true?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 6: n Does internal flashing with flashrom work, once coreboot is running?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 13: { 1, 1, 0 }, /* left front */ Are these comments correct?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 31: lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); The board does not seem to have any serial port
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 11: ports : constant Port_List := Are all of these video ports accessible?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c:
PS2: Where does this come from? Ideally, you would want to use autoport to generate this file
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c:
PS2: Where does this come from?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 7: subsystemid 0x103c 0x161c inherit This subsystem ID is wrong. It is for the 8460P
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 20: 0x3b This mask enables ports 0, 1, 3, 4, 5
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 22: device pci 1c.0 on end # PCIe Port #1 Are PCIe ports described correctly?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" Why are there spaces to indent this?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end Did you check the EC settings?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 44: chip superio/smsc/lpc47n217 : device pnp 4e.3 on # Parallel : io 0x60 = 0x378 : irq 0x70 = 7 : end : device pnp 4e.4 on # COM1 : io 0x60 = 0x3f8 : irq 0x70 = 4 : end : device pnp 4e.5 off end # COM2 : end I can't see any of these on the board
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 2: Code-Review+1
Still, good job. Moar boards 😄
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#3).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport, see https://github.com/stblr/coreboot/tree/6360b for complete output.
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb 8 files changed, 413 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/3
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 3:
(8 comments)
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@8 PS2, Line 8:
Please mention how you did this. […]
I used autoport and moved the generated code into a variant. I added a link to the full autoport output in the commit message.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 13: { 1, 1, 0 }, /* left front */
Are these comments correct?
Yes, they are based on the output of lsusb -t.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 31: lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
The board does not seem to have any serial port
The serial port is on the docking station, which I don't have.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 11: ports : constant Port_List :=
Are all of these video ports accessible?
The laptop has one DP port and one VGA, the docking station has two DP (and some analog ports). The internal screen is single-channel LVDS. I assume that all the DP ports are DP++.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 20: 0x3b
This mask enables ports 0, 1, 3, 4, 5
Autoport detected 1, 3, 4, 5. 0 and 1 have been checked manually. Out of 2, 3, 4, 5, one is unused, one is eSATA and the other two are for the docking station.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 22: device pci 1c.0 on end # PCIe Port #1
Are PCIe ports described correctly?
Yes, using lspci.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end
Did you check the EC settings?
Yes, I have checked them using radare2 on the EcThermalInit EFI module.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 44: chip superio/smsc/lpc47n217 : device pnp 4e.3 on # Parallel : io 0x60 = 0x378 : irq 0x70 = 7 : end : device pnp 4e.4 on # COM1 : io 0x60 = 0x3f8 : irq 0x70 = 4 : end : device pnp 4e.5 off end # COM2 : end
I can't see any of these on the board
They are on the docking station.
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#4).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport, see https://github.com/stblr/coreboot/tree/6360b for complete output.
Patchset 4: * update board Kconfig name * replace spaces with tabs * fix the subsystem id
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb 8 files changed, 413 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/4
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#5).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport, see https://github.com/stblr/coreboot/tree/6360b for complete output.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 8 files changed, 413 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/5
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 6: n
Does internal flashing with flashrom work, once coreboot is running?
Yes it does
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 37: SUPERIO_SMSC_LPC47N217
Is this true?
I think so, I took a picture of the board, the superio is near the docking connector. The text is barely readable though. https://imgur.com/a/zT9SefR
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 65: default 1 if BOARD_HP_6360B
Is this tested?
It's not, I added a comment to reflect this.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 5: Code-Review+1
(15 comments)
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@8 PS2, Line 8:
I used autoport and moved the generated code into a variant. […]
Right. thanks. I'd drop the link from the commit message, though, since it will eventually rot away
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 65: default 1 if BOARD_HP_6360B
It's not, I added a comment to reflect this.
Ack
https://review.coreboot.org/c/coreboot/+/42373/5/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig:
https://review.coreboot.org/c/coreboot/+/42373/5/src/mainboard/hp/snb_ivb_la... PS5, Line 30: default "probook_6360b" if BOARD_HP_PROBOOK_6360B nit: use alphabetical order?
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 25: BOARD_HP_6360B
minor: Since this is a ProBook and not an EliteBook, I would not use the same Kconfig symbol style t […]
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 37: SUPERIO_SMSC_LPC47N217
I think so, I took a picture of the board, the superio is near the docking connector. […]
Oh, it's on the board. Ok, then we can just keep this always on.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 6: n
Yes it does
Then, I'd change this to "y"
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/early_init.c:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 13: { 1, 1, 0 }, /* left front */
Yes, they are based on the output of lsusb -t.
Ack
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 31: lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
The serial port is on the docking station, which I don't have.
Right, the chip is on the board, but the port isn't useful unless docked. It slows down boot quite a bit, so if you can figure out if we're docked at this point you could make this conditional. Or, disable serial port output in Kconfig
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 11: ports : constant Port_List :=
The laptop has one DP port and one VGA, the docking station has two DP (and some analog ports). […]
You can physically inspect the mainboard to see if there are any DP switches. There should be some switches for VGA, because there's only one VGA output.
DP++ requires some additional circuitry on the mainboard, AFAIK.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 7: subsystemid 0x103c 0x161c inherit
This subsystem ID is wrong. […]
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 20: 0x3b
Autoport detected 1, 3, 4, 5. 0 and 1 have been checked manually. […]
Ok, please update the comment on the previous line
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 22: device pci 1c.0 on end # PCIe Port #1
Yes, using lspci.
Note that the vendor firmware can swap the PCIe root port functions, you can check for that by looking at their PCI device IDs
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60"
Why are there spaces to indent this?
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end
Yes, I have checked them using radare2 on the EcThermalInit EFI module.
Hrm. Seems to be the same as the other Cougar Point boards. The `ec_fan_ctrl_value` might matter, but I've no idea. There's CB:41159 as well, if you need inspiration 😄
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 44: chip superio/smsc/lpc47n217 : device pnp 4e.3 on # Parallel : io 0x60 = 0x378 : irq 0x70 = 7 : end : device pnp 4e.4 on # COM1 : io 0x60 = 0x3f8 : irq 0x70 = 4 : end : device pnp 4e.5 off end # COM2 : end
They are on the docking station.
Ack
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#6).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Patchset 6: * use alphabetical order in Kconfig files * set flashrom support to yes in board_info * update comment about SATA ports
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * screen brightness is at 100% on S3 resume (the previous setting can be recovered by pressing one of the brightness control key) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 8 files changed, 414 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/6
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 6:
(5 comments)
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@27 PS2, Line 27: TPM
Does SeaBIOS show any options to configure the TPM?
Yes
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c:
PS2:
Where does this come from? Ideally, you would want to use autoport to generate this file
Autoport
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c:
PS2:
Where does this come from?
Autoport
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 22: device pci 1c.0 on end # PCIe Port #1
Note that the vendor firmware can swap the PCIe root port functions, you can check for that by looki […]
I have checked again when running coreboot and the values are right.
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end
Hrm. Seems to be the same as the other Cougar Point boards. […]
Initially I used the same value for `ec_fan_ctrl_value` as 8460p and 2560p but the fan was always on. Now that's only the case after a cold boot. There is a script to find the good values for the ec: https://doc.coreboot.org/mainboard/hp/hp_kbc1126_laptops.html but it did not work as is (not sure exactly why, that's my first time using radare2) so I had to find them manually.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 6: Code-Review+1
(9 comments)
Note that comments can be marked as resolved. All of them need to be resolved to enable submit.
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@8 PS2, Line 8:
Right. thanks. […]
Done
https://review.coreboot.org/c/coreboot/+/42373/2//COMMIT_MSG@27 PS2, Line 27: TPM
Yes
Ok, if it's alive then it's good enough.
https://review.coreboot.org/c/coreboot/+/42373/5/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/Kconfig:
https://review.coreboot.org/c/coreboot/+/42373/5/src/mainboard/hp/snb_ivb_la... PS5, Line 30: default "probook_6360b" if BOARD_HP_PROBOOK_6360B
nit: use alphabetical order?
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/board_info.txt:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 6: n
Then, I'd change this to "y"
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gpio.c:
PS2:
Autoport
Ack
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/hda_verb.c:
PS2:
Autoport
Ack
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 20: 0x3b
Ok, please update the comment on the previous line
Done
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 22: device pci 1c.0 on end # PCIe Port #1
I have checked again when running coreboot and the values are right.
Ack
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end
Initially I used the same value for `ec_fan_ctrl_value` as 8460p and 2560p but the fan was always on […]
Weird. Maybe the EC firmware isn't the same.
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 11: ports : constant Port_List :=
You can physically inspect the mainboard to see if there are any DP switches. […]
I didn't even check but in fact, the DP ports on the laptop and the docking stations have the DP++ logo.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 11: ports : constant Port_List :=
I didn't even check but in fact, the DP ports on the laptop and the docking stations have the DP++ l […]
Ack
Iru Cai (vimacs) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... File src/mainboard/hp/snb_ivb_laptops/variants/6360b/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/42373/2/src/mainboard/hp/snb_ivb_la... PS2, Line 38: register "ec_data_port" = "0x60" : register "ec_cmd_port" = "0x64" : register "ec_ctrl_reg" = "0xca" : register "ec_fan_ctrl_value" = "0x6e" : device pnp ff.1 off end
Weird. Maybe the EC firmware isn't the same.
I don't know how exactly this value works, and the KBC1126 code in coreboot is a small part of the EC support code from the HP firmware, so bugs can happen. I've seen fan control problems on cold boots in 8560w/8760w (both workstation boards are WIP and I don't have them currently). Yes, the script is out-of-date for newer r2 versions...
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#7).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Patchset 6: * use alphabetical order in Kconfig files * set flashrom support to yes in board_info * update comment about SATA ports
Patchset 7: * add a VBT
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * acpi_video0 is not updated when writing to intel_backlight (working the other way around) * out of the 3 hotkeys, only the mute one works (and the led color is not updated)
Untested: * internal speakers and microphone (defective on my machine) * FireWire, eSATA * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 9 files changed, 415 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/7
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#8).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Patchset 6: * use alphabetical order in Kconfig files * set flashrom support to yes in board_info * update comment about SATA ports
Patchset 7: * add a VBT
Patchset 8: * eSATA port is tested
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * fan control only works after a reboot * rfkill hotkey * color of the mute hotkey
Untested: * internal speakers and microphone (defective on my machine) * FireWire * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 9 files changed, 415 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/8
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#9).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Patchset 6: * use alphabetical order in Kconfig files * set flashrom support to yes in board_info * update comment about SATA ports
Patchset 7: * add a VBT
Patchset 8: * eSATA port is tested
Patchset 9: * fix fan control issue
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * rfkill hotkey * color of the mute hotkey * sleep f-key
Untested: * internal speakers and microphone (defective on my machine) * FireWire * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/ec/hp/kbc1126/ec.c M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 10 files changed, 422 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/9
Iru Cai (vimacs) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c File src/ec/hp/kbc1126/ec.c:
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@117 PS9, Line 117: kbc1126_kbdled(conf->ec_ctrl_reg, 0); : : /* The EC needs additional time to process the first command on a cold : boot. */ : int timeout = 0x17ff; : while ((inb(conf->ec_cmd_port) & KBD_IBF) && --timeout) : It's better to make a separate commit for this.
kbc1126_kbdled also sends EC commands. Since the EC fails to receive commands, does the CapsLock LED blink many times on cold boots?
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c File src/ec/hp/kbc1126/ec.c:
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@121 PS9, Line 121: int timeout = 0x17ff; Use decimal notation, and add the unit into the name? Also use `size_t` or `unsigned int`.
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@123 PS9, Line 123: udelay(10); 1. Please use the stopwatch framework, and print out the waited time. 2. A separate commit is indeed better for code outside the mainboard code.
Pablo Stebler has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c File src/ec/hp/kbc1126/ec.c:
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@121 PS9, Line 121: int timeout = 0x17ff;
Use decimal notation, and add the unit into the name? Also use `size_t` or `unsigned int`.
To be clear, these three lines are copy-pasted from the send_kbc_* functions above, that are almost the same as the ones in src/ec/acpi/ec.c .
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@117 PS9, Line 117: kbc1126_kbdled(conf->ec_ctrl_reg, 0); : : /* The EC needs additional time to process the first command on a cold : boot. */ : int timeout = 0x17ff; : while ((inb(conf->ec_cmd_port) & KBD_IBF) && --timeout) :
It's better to make a separate commit for this. […]
No, the EC only needs a lot more time after receiving the second data value for the LEDs.
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42373
to look at the new patch set (#10).
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Patchset 4: * update the board Kconfig name * replace spaces with tabs * fix the subsystem id
Patchset 5: * update the variant directory
Patchset 6: * use alphabetical order in Kconfig files * set flashrom support to yes in board_info * update comment about SATA ports
Patchset 7: * add a VBT
Patchset 8: * eSATA port is tested
Patchset 9: * fix fan control issue
Patchset 10: * move fan control fix to a separate commit
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * rfkill hotkey * color of the mute hotkey * sleep f-key
Untested: * internal speakers and microphone (defective on my machine) * FireWire * docking station * TPM
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 9 files changed, 415 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/10
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 10: Code-Review+2
(5 comments)
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG@11 PS10, Line 11: Patchset 4: : * update the board Kconfig name : * replace spaces with tabs : * fix the subsystem id : : Patchset 5: : * update the variant directory : : Patchset 6: : * use alphabetical order in Kconfig files : * set flashrom support to yes in board_info : * update comment about SATA ports : : Patchset 7: : * add a VBT : : Patchset 8: : * eSATA port is tested : : Patchset 9: : * fix fan control issue : : Patchset 10: : * move fan control fix to a separate commit I'd drop this, because patchsets are specific to Gerrit and don't end up in the repo
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG@52 PS10, Line 52: TPM maybe expand:
* TPM (SeaBIOS detects it, no further test done)
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c File src/ec/hp/kbc1126/ec.c:
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@121 PS9, Line 121: int timeout = 0x17ff;
To be clear, these three lines are copy-pasted from the send_kbc_* functions above, that are almost […]
Ack
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@117 PS9, Line 117: kbc1126_kbdled(conf->ec_ctrl_reg, 0); : : /* The EC needs additional time to process the first command on a cold : boot. */ : int timeout = 0x17ff; : while ((inb(conf->ec_cmd_port) & KBD_IBF) && --timeout) :
No, the EC only needs a lot more time after receiving the second data value for the LEDs.
Ack
https://review.coreboot.org/c/coreboot/+/42373/9/src/ec/hp/kbc1126/ec.c@123 PS9, Line 123: udelay(10);
- Please use the stopwatch framework, and print out the waited time. […]
Ack
Patrick Georgi has uploaded a new patch set (#11) to the change originally created by Pablo Stebler. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * rfkill hotkey * color of the mute hotkey * sleep f-key
Untested: * internal speakers and microphone (defective on my machine) * FireWire * docking station * TPM (SeaBIOS detects it, no further test done)
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 9 files changed, 415 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/42373/11
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG@11 PS10, Line 11: Patchset 4: : * update the board Kconfig name : * replace spaces with tabs : * fix the subsystem id : : Patchset 5: : * update the variant directory : : Patchset 6: : * use alphabetical order in Kconfig files : * set flashrom support to yes in board_info : * update comment about SATA ports : : Patchset 7: : * add a VBT : : Patchset 8: : * eSATA port is tested : : Patchset 9: : * fix fan control issue : : Patchset 10: : * move fan control fix to a separate commit
I'd drop this, because patchsets are specific to Gerrit and don't end up in the repo
Done
https://review.coreboot.org/c/coreboot/+/42373/10//COMMIT_MSG@52 PS10, Line 52: TPM
maybe expand: […]
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
Patch Set 12:
Thanks Patrick
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42373 )
Change subject: mainboard/hp: Add ProBook 6360b ......................................................................
mainboard/hp: Add ProBook 6360b
Most of the code is generated using autoport.
Working: * booting Arch Linux from SeaBIOS * PCIe/SATA/USB ports (see overridetree and early_init for lists) * LVDS, DisplayPort, VGA, 3.5 mm jacks, RJ-45 * keyboard, touchpad * C-States, S3 suspend
Not working: * rfkill hotkey * color of the mute hotkey * sleep f-key
Untested: * internal speakers and microphone (defective on my machine) * FireWire * docking station * TPM (SeaBIOS detects it, no further test done)
Signed-off-by: Pablo Stebler pablo@stebler.xyz Change-Id: I916583fad375f16e5b02388cbcad2e8a993e042f Reviewed-on: https://review.coreboot.org/c/coreboot/+/42373 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig.name A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c A src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb 9 files changed, 415 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig index d4bf19a..812c630b 100644 --- a/src/mainboard/hp/snb_ivb_laptops/Kconfig +++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig @@ -29,6 +29,7 @@ default "8470p" if BOARD_HP_8470P default "8770w" if BOARD_HP_8770W default "folio_9470m" if BOARD_HP_FOLIO_9470M + default "probook_6360b" if BOARD_HP_PROBOOK_6360B default "revolve_810_g1" if BOARD_HP_REVOLVE_810_G1
config MAINBOARD_PART_NUMBER @@ -40,6 +41,7 @@ default "EliteBook 8470p" if BOARD_HP_8470P default "EliteBook 8770w" if BOARD_HP_8770W default "EliteBook Folio 9470m" if BOARD_HP_FOLIO_9470M + default "ProBook 6360b" if BOARD_HP_PROBOOK_6360B default "EliteBook Revolve 810 G1" if BOARD_HP_REVOLVE_810_G1
config OVERRIDE_DEVICETREE @@ -65,6 +67,7 @@ default 2 if BOARD_HP_8470P default 2 if BOARD_HP_8770W default 0 if BOARD_HP_FOLIO_9470M + default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this default 2 if BOARD_HP_REVOLVE_810_G1 # FIXME: check this
endif diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name index 8931cf1..8a27190 100644 --- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name +++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name @@ -79,6 +79,21 @@ select MAINBOARD_USES_IFD_GBE_REGION select SOUTHBRIDGE_INTEL_C216
+config BOARD_HP_PROBOOK_6360B + bool "ProBook 6360b" + + select BOARD_HP_SNB_IVB_LAPTOPS + select BOARD_ROMSIZE_KB_4096 + select GFX_GMA_PANEL_1_ON_LVDS + select INTEL_GMA_HAVE_VBT + select INTEL_INT15 + select MAINBOARD_HAS_LIBGFXINIT + select MAINBOARD_HAS_LPC_TPM + select MAINBOARD_HAS_TPM1 + select MAINBOARD_USES_IFD_GBE_REGION + select SOUTHBRIDGE_INTEL_BD82X6X + select SUPERIO_SMSC_LPC47N217 + config BOARD_HP_REVOLVE_810_G1 bool "EliteBook Revolve 810 G1"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt new file mode 100644 index 0000000..9f32b27 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/board_info.txt @@ -0,0 +1,7 @@ +Category: laptop +Board URL: https://support.hp.com/us-en/product/hp-probook-6360b-notebook-pc/5045581 +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: y +Release year: 2011 diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt new file mode 100644 index 0000000..14ed640 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/data.vbt Binary files differ diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c new file mode 100644 index 0000000..9524301 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/early_init.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <bootblock_common.h> +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <superio/smsc/lpc47n217/lpc47n217.h> +#include <ec/hp/kbc1126/ec.h> + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* left front */ + { 1, 1, 0 }, /* left rear, debug */ + { 1, 1, 1 }, /* eSATA */ + { 1, 1, 1 }, /* webcam */ + { 1, 0, 2 }, + { 1, 0, 2 }, /* bluetooth */ + { 0, 0, 3 }, + { 0, 0, 3 }, + { 1, 1, 4 }, /* fingerprint reader */ + { 1, 1, 4 }, /* WWAN */ + { 1, 0, 5 }, /* right */ + { 1, 0, 5 }, + { 1, 0, 6 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads new file mode 100644 index 0000000..3df1e37 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gma-mainboard.ads @@ -0,0 +1,22 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + DP2, + DP3, + HDMI1, + HDMI2, + HDMI3, + Analog, + LVDS, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c new file mode 100644 index 0000000..c281dcd --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/gpio.c @@ -0,0 +1,225 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_GPIO, + .gpio3 = GPIO_MODE_GPIO, + .gpio4 = GPIO_MODE_GPIO, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_GPIO, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_GPIO, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_OUTPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio2 = GPIO_DIR_INPUT, + .gpio3 = GPIO_DIR_INPUT, + .gpio4 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio10 = GPIO_DIR_INPUT, + .gpio11 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_INPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_OUTPUT, + .gpio23 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio0 = GPIO_LEVEL_LOW, + .gpio11 = GPIO_LEVEL_LOW, + .gpio17 = GPIO_LEVEL_HIGH, + .gpio22 = GPIO_LEVEL_HIGH, + .gpio24 = GPIO_LEVEL_HIGH, + .gpio27 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, + .gpio30 = GPIO_RESET_RSMRST, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio1 = GPIO_INVERT, + .gpio3 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio7 = GPIO_INVERT, + .gpio10 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, + .gpio14 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_NATIVE, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_NATIVE, + .gpio44 = GPIO_MODE_GPIO, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_GPIO, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_GPIO, + .gpio51 = GPIO_MODE_GPIO, + .gpio52 = GPIO_MODE_GPIO, + .gpio53 = GPIO_MODE_GPIO, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_OUTPUT, + .gpio36 = GPIO_DIR_OUTPUT, + .gpio37 = GPIO_DIR_OUTPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio44 = GPIO_DIR_INPUT, + .gpio46 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_OUTPUT, + .gpio50 = GPIO_DIR_INPUT, + .gpio51 = GPIO_DIR_INPUT, + .gpio52 = GPIO_DIR_INPUT, + .gpio53 = GPIO_DIR_OUTPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio55 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_OUTPUT, + .gpio60 = GPIO_DIR_OUTPUT, + .gpio61 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio33 = GPIO_LEVEL_LOW, + .gpio35 = GPIO_LEVEL_LOW, + .gpio36 = GPIO_LEVEL_LOW, + .gpio37 = GPIO_LEVEL_LOW, + .gpio49 = GPIO_LEVEL_LOW, + .gpio53 = GPIO_LEVEL_HIGH, + .gpio57 = GPIO_LEVEL_HIGH, + .gpio60 = GPIO_LEVEL_HIGH, + .gpio61 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_GPIO, + .gpio74 = GPIO_MODE_GPIO, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_OUTPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_OUTPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_OUTPUT, + .gpio73 = GPIO_DIR_OUTPUT, + .gpio74 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio68 = GPIO_LEVEL_HIGH, + .gpio70 = GPIO_LEVEL_HIGH, + .gpio71 = GPIO_LEVEL_HIGH, + .gpio72 = GPIO_LEVEL_LOW, + .gpio73 = GPIO_LEVEL_HIGH, + .gpio74 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c new file mode 100644 index 0000000..40de8bc --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/hda_verb.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + 0x111d7605, /* Codec Vendor / Device ID: IDT */ + 0x103c1620, /* Subsystem ID */ + 11, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x103c1620), + AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x0b, 0x0421401f), + AZALIA_PIN_CFG(0, 0x0c, 0x04a11020), + AZALIA_PIN_CFG(0, 0x0d, 0x90170110), + AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x10, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x11, 0x90a60130), + AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0), + AZALIA_PIN_CFG(0, 0x20, 0x40f000f0), + + 0x11c11040, /* Codec Vendor / Device ID: LSI */ + 0x103c3066, /* Subsystem ID */ + 1, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(1, 0x103c3066), + + 0x80862805, /* Codec Vendor / Device ID: Intel */ + 0x80860101, /* Subsystem ID */ + 4, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(3, 0x80860101), + AZALIA_PIN_CFG(3, 0x05, 0x18560010), + AZALIA_PIN_CFG(3, 0x06, 0x18560020), + AZALIA_PIN_CFG(3, 0x07, 0x18560030), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb new file mode 100644 index 0000000..3289588 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip northbridge/intel/sandybridge + register "gpu_cpu_backlight" = "0x0000014a" + + device domain 0 on + subsystemid 0x103c 0x1621 inherit + + device pci 01.0 off end # PEG + device pci 02.0 on end # iGPU + + chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + register "gen1_dec" = "0x007c0201" + register "gen2_dec" = "0x000c0101" + register "gen3_dec" = "0x00fcfe01" + register "gen4_dec" = "0x000402e9" + register "gpi6_routing" = "2" + register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }" + # HDD(0), ODD(1), docking(3, 5), eSATA(4) + # FIXME: ports 3, 5 are untested + register "sata_port_map" = "0x3b" + + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.1 on # PCIe Port #2, ExpressCard + smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort" + "ExpressCard Slot" "SlotDataBusWidth1X" + end + device pci 1c.2 on end # PCIe Port #3, SD/MMC and FireWire + device pci 1c.3 on # PCIe Port #4, WLAN + smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO" + "SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X" + end + device pci 1c.4 off end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1c.6 on end # PCIe Port #7, WWAN + device pci 1c.7 off end # PCIe Port #8 + device pci 1f.0 on + chip ec/hp/kbc1126 + register "ec_data_port" = "0x60" + register "ec_cmd_port" = "0x64" + register "ec_ctrl_reg" = "0xca" + register "ec_fan_ctrl_value" = "0x6e" + device pnp ff.1 off end + end + chip superio/smsc/lpc47n217 + device pnp 4e.3 on # Parallel + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 4e.4 on # COM1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 4e.5 off end # COM2 + end + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + end + end + end +end
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