Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56092 )
Change subject: sc7280: Add support for USB ......................................................................
sc7280: Add support for USB
Adding USB addressmap for sc7280. Use common USB driver for sc7280.
BUG=b:182963902 TEST=Validated USB enumeration on qcom sc7280 development board
Signed-off-by: Sandeep Maheswaram sanm@codeaurora.org Change-Id: Ib92b74c8035a8c0148a9aa48e7870b261b832a33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56092 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/soc/qualcomm/sc7280/Makefile.inc M src/soc/qualcomm/sc7280/include/soc/addressmap.h 2 files changed, 14 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index 72fb57f..6a02bdb 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -30,12 +30,16 @@ romstage-y += ../common/qclib.c romstage-y += ../common/mmu.c romstage-y += mmu.c +romstage-y += ../common/usb/usb.c romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c
################################################################################ ramstage-y += soc.c ramstage-y += cbmem.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c +ramstage-y += ../common/usb/usb.c +ramstage-y += ../common/usb/snps_usb_phy.c +ramstage-y += ../common/usb/qmpv4_usb_phy.c ramstage-y += ../common/aop_load_reset.c ramstage-y += cpucp_load_reset.c
diff --git a/src/soc/qualcomm/sc7280/include/soc/addressmap.h b/src/soc/qualcomm/sc7280/include/soc/addressmap.h index 8515a04..31f409f 100644 --- a/src/soc/qualcomm/sc7280/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7280/include/soc/addressmap.h @@ -58,4 +58,14 @@ #define EPSSTOP_EPSS_TOP 0x18598000 #define EPSSFAST_BASE_ADDR 0x18580000
+/* + * USB BASE ADDRESSES + */ +#define HS_USB_PRIM_PHY_BASE 0x088e3000 +#define QMP_PHY_QSERDES_COM_REG_BASE 0x088e9000 +#define QMP_PHY_QSERDES_TX_REG_BASE 0x088e9200 +#define QMP_PHY_QSERDES_RX_REG_BASE 0x088e9400 +#define QMP_PHY_PCS_REG_BASE 0x088e9c00 +#define USB_HOST_DWC3_BASE 0x0a60c100 + #endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */