Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31902 )
Change subject: soc/intel/cannonlake: Clear PMCON status bits ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/31902/5/src/soc/intel/cannonlake/pmutil.c File src/soc/intel/cannonlake/pmutil.c:
https://review.coreboot.org/#/c/31902/5/src/soc/intel/cannonlake/pmutil.c@15... PS5, Line 152: /* Don't clear bits that are write-1-to-clear */ you are actually clearing some bits which are write 1 to clear. Mention what you are clearing here.