Change in coreboot[master]: soc/intel/skylake: Move soc_fsp_load

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50796 )

Change subject: soc/intel/skylake: Move soc_fsp_load
......................................................................

soc/intel/skylake: Move soc_fsp_load

Move this function into the compilation unit where it is called.

Change-Id: Ia4bdcd545827c2564430521a98246fc96bf0ba92
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50796
Reviewed-by: Angel Pons 
Reviewed-by: Kyösti Mälkki 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/include/soc/ramstage.h
3 files changed, 5 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Kyösti Mälkki: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 4f120bc..728b023 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -74,11 +74,6 @@
    	pcie_rp_update_devicetree(pch_lp_rp_groups);
 }

-void soc_fsp_load(void)
-{
-	fsps_load();
-}
-
 static struct device_operations pci_domain_ops = {
    .read_resources   = &pci_domain_read_resources,
    .set_resources    = &pci_domain_set_resources,
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 307c849..4cadb7f 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -176,6 +176,11 @@
    	printk(BIOS_CRIT, "CRITICAL ERROR: MP post init failed\n");
 }

+static void soc_fsp_load(void)
+{
+	fsps_load();
+}
+
 static const struct mp_ops mp_ops = {
    /*
     * Skip Pre MP init MTRR programming as MTRRs are mirrored from BSP,
diff --git a/src/soc/intel/skylake/include/soc/ramstage.h b/src/soc/intel/skylake/include/soc/ramstage.h
index f6a4b84..02d53a1 100644
--- a/src/soc/intel/skylake/include/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/soc/ramstage.h
@@ -13,7 +13,6 @@
 #define FSP_MEM_UPD FSP_M_CONFIG

void mainboard_silicon_init_params(FSP_S_CONFIG *params);
-void soc_fsp_load(void);
 void soc_init_pre_device(void *chip_info);
 void soc_irq_settings(FSP_SIL_UPD *params);
 const char *soc_acpi_name(const struct device *dev);