Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59269 )
Change subject: mb/google/brya/var/redrix: De-assert SSD PERST# in romstage ......................................................................
mb/google/brya/var/redrix: De-assert SSD PERST# in romstage
After CB:57539 applied, it can support romstage GPIO table override. We can move SSD PERST# de-assertion to romstage.
The reason for this is to give enough time after PERST# deassertion so that the SSD has enough time to initialize before the FSP scans the RPs for downstream devices.
BUG=b:199714453 TEST=build
Signed-off-by: Wisley Chen wisley.chen@quanta.corp-partner.google.com Change-Id: I242cb1517f564d9d135d523b1e7f95ac34d601f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59269 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/variants/redrix/gpio.c 1 file changed, 3 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/redrix/gpio.c b/src/mainboard/google/brya/variants/redrix/gpio.c index 20d6b48..afcb7e9 100644 --- a/src/mainboard/google/brya/variants/redrix/gpio.c +++ b/src/mainboard/google/brya/variants/redrix/gpio.c @@ -116,7 +116,7 @@ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* * enable EN_PP3300_SSD in bootblock, then PERST# is asserted, and - * then deassert PERST# in ramstage + * then deassert PERST# in romstage */ /* H13 : I2C7_SCL ==> EN_PP3300_SD */ PAD_CFG_GPO(GPP_H13, 1, DEEP), @@ -125,6 +125,8 @@ };
static const struct pad_config romstage_gpio_table[] = { + /* B4 : PROC_GP3 ==> SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 1, DEEP), /* F21 : EXT_PWR_GATE2# ==> WWAN_FCPO_L (set here for correct power sequencing) */ PAD_CFG_GPO(GPP_F21, 1, DEEP), };
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.