Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85284?usp=email )
Change subject: soc/intel/common/block: Fixup itss_get_on_chip_dev_pirq ......................................................................
soc/intel/common/block: Fixup itss_get_on_chip_dev_pirq
pcr_read16(PID_ITSS, itss_soc_get_on_chip_dev_pir(dev)) returns the register content and should not be compared with PCI_ITSS_PIR(0) which is an address offset. By now, we assume the returned PIR is always effective and usable.
Change-Id: I2e61629bdcdea33f260bfbc47f22d40d9a869c6b Signed-off-by: Shuo Liu shuo.liu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85284 Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com Reviewed-by: yuchi.chen@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/itss/itss.c 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: Lean Sheng Tan: Looks good to me, approved build bot (Jenkins): Verified yuchi.chen@intel.com: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/common/block/itss/itss.c b/src/soc/intel/common/block/itss/itss.c index e2ff3ef..8409e96 100644 --- a/src/soc/intel/common/block/itss/itss.c +++ b/src/soc/intel/common/block/itss/itss.c @@ -142,8 +142,6 @@ return PIRQ_INVALID;
uint16_t pir = pcr_read16(PID_ITSS, itss_soc_get_on_chip_dev_pir(dev)); - if (pir < PCI_ITSS_PIR(0)) - return PIRQ_INVALID;
/* The lower 3 bits of every 4 bits indicates which PIRQ is connect to INT. */ unsigned int pir_shift = (pin - PCI_INT_A) * 4;