Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use macros instead of magic numbers

List overview All Threads
Download

newer

older

Change in ...coreboot[master]:...

HAOUAS Elyes (Code Review)

10 Feb 2019 10 Feb '19

2:01 p.m.

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31310

Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................

sb/intel/i82801gx/lpc: Use macros instead of magic numbers

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 12 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/1

diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 7497c79..25e5ec7 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -259,12 +259,12 @@ outw(config->alt_gp_smi_en, pmbase + ALT_GP_SMI_EN);

/* Set up power management block and determine sleep mode */ - reg32 = inl(pmbase + 0x04); // PM1_CNT + reg32 = inl(pmbase + PM1_CNT);

reg32 &= ~(7 << 10); // SLP_TYP - reg32 |= (1 << 1); // enable C3->C0 transition on bus master - reg32 |= (1 << 0); // SCI_EN - outl(reg32, pmbase + 0x04); + reg32 |= BM_RLD; // enable C3->C0 transition on bus master + reg32 |= SCI_EN; + outl(reg32, pmbase + PM1_CNT); }

static void i82801gx_configure_cstates(struct device *dev) @@ -489,11 +489,11 @@

fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; - fadt->pm1a_cnt_blk = pmbase + 0x4; + fadt->pm1a_cnt_blk = pmbase + PM1_CNT; fadt->pm1b_cnt_blk = 0x0; - fadt->pm2_cnt_blk = pmbase + 0x20; - fadt->pm_tmr_blk = pmbase + 0x8; - fadt->gpe0_blk = pmbase + 0x28; + fadt->pm2_cnt_blk = pmbase + PM2_CNT; + fadt->pm_tmr_blk = pmbase + PM1_TMR; + fadt->gpe0_blk = pmbase + GPE0_STS; fadt->gpe1_blk = 0;

fadt->pm1_evt_len = 4; @@ -531,7 +531,7 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; - fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; + fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;

fadt->x_pm1b_cnt_blk.space_id = 0; @@ -545,21 +545,21 @@ fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20; + fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; fadt->x_pm2_cnt_blk.addrh = 0x0;

fadt->x_pm_tmr_blk.space_id = 1; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; - fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; + fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0;

fadt->x_gpe0_blk.space_id = 1; fadt->x_gpe0_blk.bit_width = 64; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + 0x28; + fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; fadt->x_gpe0_blk.addrh = 0x0;

fadt->x_gpe1_blk.space_id = 0;

Attachments:

attachment.htm (text/html — 6.2 KB)

Show replies by date

HAOUAS Elyes (Code Review)

12 Feb 12 Feb

7:26 a.m.

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31310

to look at the new patch set (#2).

Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................

sb/intel/i82801gx/lpc: Use macros instead of magic numbers

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 10 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/2

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Paul Menzel (Code Review)

12:11 p.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31310 )

Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................

Patch Set 2: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Tue, 12 Feb 2019 12:11:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Patrick Rudolph (Code Review)

13 Apr 13 Apr

8:26 a.m.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31310 )

Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................

Patch Set 3: Code-Review+1

(3 comments)

https://review.coreboot.org/#/c/31310/3/src/southbridge/intel/i82801gx/lpc.c File src/southbridge/intel/i82801gx/lpc.c:

https://review.coreboot.org/#/c/31310/3/src/southbridge/intel/i82801gx/lpc.c... PS3, Line 263: should use read_pmbase32

https://review.coreboot.org/#/c/31310/3/src/southbridge/intel/i82801gx/lpc.c... PS3, Line 268: should use write_pmbase32

https://review.coreboot.org/#/c/31310/3/src/southbridge/intel/i82801gx/lpc.c... PS3, Line 489: should use lpc_get_pmbase(), probably out of scope of this patch

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sat, 13 Apr 2019 08:26:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

8:40 a.m.

Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31310

to look at the new patch set (#4).

Change subject: sb/intel/i82801gx/lpc: Use macros instead of magic numbers ......................................................................

sb/intel/i82801gx/lpc: Use macros instead of magic numbers

Also use defined {read,write}_pmbase32 function.

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 13 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/4

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

HAOUAS Elyes (Code Review)

4:01 p.m.

New subject: Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31310

to look at the new patch set (#5).

Change subject: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase ......................................................................

sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Also use macros instead of magic numbers.

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 17 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/5

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 5 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Patrick Rudolph (Code Review)

4:31 p.m.

New subject: Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31310 )

Change subject: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase ......................................................................

Patch Set 6: Code-Review+1

(1 comment)

https://review.coreboot.org/#/c/31310/6/src/southbridge/intel/i82801gx/lpc.c File src/southbridge/intel/i82801gx/lpc.c:

https://review.coreboot.org/#/c/31310/6/src/southbridge/intel/i82801gx/lpc.c... PS6, Line 264: /* Set up power management block and determine sleep mode */ pmbase is no longer used an can be removed

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 6 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sat, 13 Apr 2019 16:31:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

HAOUAS Elyes (Code Review)

6:50 p.m.

New subject: Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31310

to look at the new patch set (#7).

Change subject: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase ......................................................................

sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Also use macros instead of magic numbers.

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 17 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/31310/7

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 7 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Patrick Rudolph (Code Review)

14 Apr 14 Apr

6:43 a.m.

New subject: Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31310 )

Change subject: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase ......................................................................

Patch Set 7: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 7 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 14 Apr 2019 06:43:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Patrick Georgi (Code Review)

23 Apr 23 Apr

9:59 a.m.

New subject: Change in ...coreboot[master]: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31310 )

Change subject: sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase ......................................................................

sb/intel/i82801gx/lpc: Use {read,write}_pmbase32 and lpc_get_pmbase

Also use macros instead of magic numbers.

Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/31310 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/southbridge/intel/i82801gx/lpc.c 1 file changed, 17 insertions(+), 17 deletions(-)

Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved

diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index a1cc45a..9a6c9cf 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -25,7 +25,6 @@ #include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> -#include "i82801gx.h" #include <cpu/x86/smm.h> #include <arch/acpigen.h> #include <arch/smp/mpspec.h> @@ -33,6 +32,9 @@ #include <string.h> #include <drivers/intel/gma/i915.h> #include <southbridge/intel/common/acpi_pirq_gen.h> +#include <southbridge/intel/common/pmbase.h> + +#include "i82801gx.h" #include "nvs.h"

#define NMI_OFF 0 @@ -167,7 +169,7 @@ static void i82801gx_power_options(struct device *dev) { u8 reg8; - u16 reg16, pmbase; + u16 reg16; u32 reg32; const char *state; /* Get the chip configuration */ @@ -254,18 +256,16 @@ // Set the board's GPI routing. i82801gx_gpi_routing(dev);

- pmbase = pci_read_config16(dev, 0x40) & 0xfffe; - - outl(config->gpe0_en, pmbase + GPE0_EN); - outw(config->alt_gp_smi_en, pmbase + ALT_GP_SMI_EN); + write_pmbase32(GPE0_EN, config->gpe0_en); + write_pmbase16(ALT_GP_SMI_EN, config->alt_gp_smi_en);

/* Set up power management block and determine sleep mode */ - reg32 = inl(pmbase + 0x04); // PM1_CNT + reg32 = read_pmbase32(PM1_CNT);

reg32 &= ~(7 << 10); // SLP_TYP reg32 |= (1 << 1); // enable C3->C0 transition on bus master reg32 |= (1 << 0); // SCI_EN - outl(reg32, pmbase + 0x04); + write_pmbase32(PM1_CNT, reg32); }

static void i82801gx_configure_cstates(struct device *dev) @@ -486,15 +486,15 @@ { struct device *dev = pcidev_on_root(0x1f, 0); config_t *chip = dev->chip_info; - u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; + u16 pmbase = lpc_get_pmbase();

fadt->pm1_evt_len = 4; @@ -532,7 +532,7 @@ fadt->x_pm1a_cnt_blk.bit_width = 16; fadt->x_pm1a_cnt_blk.bit_offset = 0; fadt->x_pm1a_cnt_blk.access_size = ACPI_ACCESS_SIZE_WORD_ACCESS; - fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; + fadt->x_pm1a_cnt_blk.addrl = pmbase + PM1_CNT; fadt->x_pm1a_cnt_blk.addrh = 0x0;

fadt->x_pm1b_cnt_blk.space_id = 0; @@ -546,21 +546,21 @@ fadt->x_pm2_cnt_blk.bit_width = 8; fadt->x_pm2_cnt_blk.bit_offset = 0; fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20; + fadt->x_pm2_cnt_blk.addrl = pmbase + PM2_CNT; fadt->x_pm2_cnt_blk.addrh = 0x0;

fadt->x_gpe1_blk.space_id = 0;

-- To view, visit https://review.coreboot.org/c/coreboot/+/31310 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00bd687c487894c72d4e4363774dbcdfaf62dd54 Gerrit-Change-Number: 31310 Gerrit-PatchSet: 8 Gerrit-Owner: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: merged

1985

days inactive

2057

days old

coreboot-gerrit@coreboot.org

9 comments

4 participants

tags (0)

participants (4)

HAOUAS Elyes (Code Review)
Patrick Georgi (Code Review)
Patrick Rudolph (Code Review)
Paul Menzel (Code Review)