[S] Change in coreboot[main]: soc/mediatek/mt8196: Initialize SSPM

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85516?usp=email )

(

17 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/mediatek/mt8196: Initialize SSPM
......................................................................

soc/mediatek/mt8196: Initialize SSPM

SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to its
SRAM space and then enable it.

It takes 20 ms to load sspm.bin.

coreboot logs:
CBFS: Found 'sspm.bin' @0x62c00 size 0x21ab6 in mcache @0xfffdd314
mtk_init_mcu: Loaded (and reset) sspm.bin in 20 msecs (256212 bytes)

TEST=can see the sspm logs.
BUG=b:372173976

Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0
Signed-off-by: Kenji Yu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85516
Tested-by: build bot (Jenkins) 
Reviewed-by: Yu-Ping Wu 
Reviewed-by: Yidi Lin 
---
M src/soc/mediatek/common/include/soc/sspm.h
M src/soc/mediatek/common/sspm.c
M src/soc/mediatek/mt8196/Kconfig
M src/soc/mediatek/mt8196/Makefile.mk
M src/soc/mediatek/mt8196/include/soc/addressmap.h
M src/soc/mediatek/mt8196/soc.c
A src/soc/mediatek/mt8196/sspm_sram.c
7 files changed, 39 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Yidi Lin: Looks good to me, approved
  Yu-Ping Wu: Looks good to me, approved

diff --git a/src/soc/mediatek/common/include/soc/sspm.h b/src/soc/mediatek/common/include/soc/sspm.h
index ff405ce..81f9a62 100644
--- a/src/soc/mediatek/common/include/soc/sspm.h
+++ b/src/soc/mediatek/common/include/soc/sspm.h
@@ -10,5 +10,8 @@
    u32 sw_rstn;
 };
 static struct sspm_regs *const sspm_reg = (void *)SSPM_CFG_BASE;
+
+void sspm_enable_sram(void);
 void sspm_init(void);
+
 #endif  /* SOC_MEDIATEK_COMMON_SSPM_H */
diff --git a/src/soc/mediatek/common/sspm.c b/src/soc/mediatek/common/sspm.c
index 0a4d5b0..d1031f5 100644
--- a/src/soc/mediatek/common/sspm.c
+++ b/src/soc/mediatek/common/sspm.c
@@ -16,8 +16,15 @@
    .reset = reset_sspm,
 };

+__weak void sspm_enable_sram(void)
+{
+	/* do nothing. */
+}
+
 void sspm_init(void)
 {
+	sspm_enable_sram();
+
    sspm.load_buffer = _dram_dma;
    sspm.buffer_size = REGION_SIZE(dram_dma);

diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig
index 984e379..2133dbb 100644
--- a/src/soc/mediatek/mt8196/Kconfig
+++ b/src/soc/mediatek/mt8196/Kconfig
@@ -38,4 +38,11 @@
    default "dpm.pm"
    help
      The file name of the MediaTek DPM PM firmware.
+
+config SSPM_FIRMWARE
+	string
+	default "sspm.bin"
+	help
+	  The file name of the MediaTek SSPM firmware.
+
 endif
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index 2a01ee5..f48f380 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -47,6 +47,7 @@
 ramstage-y += ../common/mt6363.c mt6363.c
 ramstage-y += ../common/mt6363_sdmadc.c
 ramstage-y += soc.c
+ramstage-y += ../common/sspm.c sspm_sram.c
 ramstage-y += ../common/pmif_clk.c pmif_clk.c
 ramstage-y += ../common/pmif.c pmif_init.c
 ramstage-y += pmif_spmi.c
@@ -61,7 +62,8 @@

mcu-firmware-files := \
    $(CONFIG_DPM_DM_FIRMWARE) \
-	$(CONFIG_DPM_PM_FIRMWARE)
+	$(CONFIG_DPM_PM_FIRMWARE) \
+	$(CONFIG_SSPM_FIRMWARE)

$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
    $(eval $(fw)-file := $(MT8196_BLOB_DIR)/$(fw)) \
diff --git a/src/soc/mediatek/mt8196/include/soc/addressmap.h b/src/soc/mediatek/mt8196/include/soc/addressmap.h
index b252eec..cc57292 100644
--- a/src/soc/mediatek/mt8196/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8196/include/soc/addressmap.h
@@ -153,6 +153,8 @@
    SPMI_MST_BASE		= IO_PHYS + 0x0C01C000,
    SPMI_MST_P_BASE		= IO_PHYS + 0x0C01C800,
    VLP_AO_DEBUG_BASE	= IO_PHYS + 0x0C031000,
+	SSPM_SRAM_BASE		= IO_PHYS + 0x0C300000,
+	SSPM_CFG_BASE		= IO_PHYS + 0x0C340000,
    SYSTIMER_BASE		= IO_PHYS + 0x0C400000,
    VLP_TRACKER_BASE        = IO_PHYS + 0x0C4E0000,
    MMVOTE_MMSYS_CONFIG_BASE	= IO_PHYS + 0x12000000,
diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c
index 8aca5d6..0fe6909 100644
--- a/src/soc/mediatek/mt8196/soc.c
+++ b/src/soc/mediatek/mt8196/soc.c
@@ -6,6 +6,7 @@
 #include <soc/emi.h>
 #include <soc/mmu_operations.h>
 #include <soc/pcie.h>
+#include <soc/sspm.h>
 #include <soc/symbols.h>
 #include <symbols.h>

@@ -26,6 +27,7 @@
 static void soc_init(struct device *dev)
 {
    mtk_mmu_disable_l2c_sram();
+	sspm_init();
 }

static struct device_operations soc_ops = {
diff --git a/src/soc/mediatek/mt8196/sspm_sram.c b/src/soc/mediatek/mt8196/sspm_sram.c
new file mode 100644
index 0000000..5c9a80e
--- /dev/null
+++ b/src/soc/mediatek/mt8196/sspm_sram.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <soc/sspm.h>
+
+#define SSPM_SRAM_CON		(SPM_BASE + 0xEE4)
+#define SPM_PRJ_CODE		0xB160001
+#define SSPM_SRAM_SLEEP_B	0x10
+#define SSPM_SRAM_ISOINT_B	0x2
+
+void sspm_enable_sram(void)
+{
+	write32p(SPM_BASE, SPM_PRJ_CODE);
+	write32p(SSPM_SRAM_CON, SSPM_SRAM_SLEEP_B | SSPM_SRAM_ISOINT_B);
+}