Change in coreboot[master]: cpu/x86/mpinit: Serialize microcode updates for HT threads

[Patrick Rudolph (Code Review)]

Attention is currently required from: Angel Pons, Patrick Rudolph.
Hello build bot (Jenkins), Arthur Heymans, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/49303

to look at the new patch set (#2).

Change subject: cpu/x86/mpinit: Serialize microcode updates for HT threads
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cpu/x86/mpinit: Serialize microcode updates for HT threads

This change affects Intel CPUs only. As most platforms are doing
uCode update using FIT, they aren't affected by this code either.

Update microcode in MP-init using a single spinlock when running on
a Hyper-Threading enabled CPU on pre FIT platforms.
This will slow down the MP-init boot flow.

Intel SDM and various BWGs specify to use a semaphore to update
microcode on one thread per core on Hyper-Threading enabled CPUs.
Due to this complex code would be necessary to determining the core #ID,
initializing and picking the right semaphore out of CONFIG_MAX_CPUS / 2.
Instead use the existing global spinlock already present in MPinit code.
Assuming that only pre-FIT platforms with Hyper-Threading enabled and at
most 8 threads will ever run into this condition, the boot delay is
negligible.

This change is a counterproposal to the previous published patch series
being much more unsophisticated.

Change-Id: I27bf5177859c12e92d6ce7a2966c965d7262b472
Signed-off-by: Patrick Rudolph 
---
M src/cpu/intel/model_1067x/mp_init.c
M src/cpu/intel/model_2065x/model_2065x_init.c
M src/cpu/intel/model_206ax/model_206ax_init.c
M src/cpu/x86/sipi_vector.S
M src/soc/intel/baytrail/cpu.c
M src/soc/intel/braswell/cpu.c
6 files changed, 22 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/49303/2