Change in coreboot[master]: soc/amd/common/block/acpimmio/print_reset_status: add missing status bit

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/60184

to look at the new patch set (#2).

Change subject: soc/amd/common/block/acpimmio/print_reset_status: add missing status bit
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soc/amd/common/block/acpimmio/print_reset_status: add missing status bit

Both the Picasso PPR #55570 Rev 3.18 and the Cezanne PPR #56569 Rev 3.03
define bit 9 of the PM_RST_STATUS register as internal Thermal Trip
reset status bit.

Signed-off-by: Felix Held 
Change-Id: Ida8b13fe62b16c18fc9924520b83220e73eca624
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M src/soc/amd/common/block/acpimmio/print_reset_status.c
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/60184/2