[XS] Change in coreboot[main]: mb/google/fatcat: Adjust EC host command range for microchip EC

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84919?usp=email )

Change subject: mb/google/fatcat: Adjust EC host command range for microchip EC
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mb/google/fatcat: Adjust EC host command range for microchip EC

This commit adjusts the EC host command range for the Fatcat board to
0x800-0x807 & 0x200-0x20f.

This change is necessary because the microchip EC used on the Fatcat
board has a smaller host command range than the ITE/Nuvoton ECs used
on other Fatcat variants.

The `gen1_dec` register in the devicetree is updated to reflect this
change.

As per boot log, the `gen1_dec` aka offset 0x84, base address is 800
and size is 8 bytes.

AP FW Boot log:

[SPEW]   PCI: 00:00:1f.0 resource base 800 size 8 align 0 gran 0 limit 0 flags c0000100 index 84

BUG=b:376207365
TEST=Able to build and boot google/fatcat w/o any error.

without this patch:

[SPEW ]  LPC: Trying to open IO window from 800 size 8
    [ERROR]  LPC: Cannot open IO window: 800 size 8
    [ERROR]  No more IO windows

with this patch:

[SPEW ]  LPC: Trying to open IO window from 800 size 8

Change-Id: Ifcee533341fa583d841a4b564f25831c6d04e951
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84919
Reviewed-by: Anil Kumar K 
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
Reviewed-by: Pranava Y N 
Reviewed-by: Vijay P Hiremath 
---
M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
1 file changed, 5 insertions(+), 2 deletions(-)

Approvals:
  Anil Kumar K: Looks good to me, but someone else must approve
  Vijay P Hiremath: Looks good to me, but someone else must approve
  Pranava Y N: Looks good to me, approved
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
index d794925..1b1fc73 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
@@ -4,8 +4,11 @@
    register "pmc_gpe0_dw1" = "GPP_D"
    register "pmc_gpe0_dw2" = "GPP_E"

-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
+	# For Fatcat (with microchip EC):
+	#	EC host command ranges are in 0x800-0x807 & 0x200-0x20f
+	# For other Fatcat variants (with ITE/Nuvoton EC):
+	# 	EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
+	register "gen1_dec" = "CONFIG(BOARD_GOOGLE_FATCAT) ? 0x00040801 : 0x00fc0801"
    register "gen2_dec" = "0x000c0201"
    # EC memory map range is 0x900-0x9ff
    register "gen3_dec" = "0x00fc0901"