Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9356
-gerrit
commit f0801552c2fc21c527cf994a84b6ad9d0870044a Author: Vadim Bendebury vbendeb@chromium.org Date: Thu Oct 16 11:20:15 2014 -0700
bg4cd: provide support for the SPI_WRAPPER configuration mode
The SOC code should include the SPI controller driver when configured. With the upcoming configuration change media.c is not needed anymore.
BRANCH=none BUG=chrome-os-partner:32631 TEST=the driver compiles when the upcoming patches are applied
Change-Id: I8212f191b7d80f0bee86f746813edaf8e5ee6db1 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: fd4853be5157247bb73fc22b9d4f8300228fe6ce Original-Change-Id: If7e12e2fb04e63c36d9696d13e08397b91a77a8c Original-Signed-off-by: Vadim Bendebury vbendeb@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/223750 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/soc/marvell/bg4cd/Makefile.inc | 8 ++++---- src/soc/marvell/bg4cd/media.c | 25 ------------------------- 2 files changed, 4 insertions(+), 29 deletions(-)
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc index 7367c3d..0271fc7 100644 --- a/src/soc/marvell/bg4cd/Makefile.inc +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -20,26 +20,26 @@ bootblock-y += bootblock.c bootblock-y += cbmem.c bootblock-y += i2c.c -bootblock-y += media.c bootblock-y += monotonic_timer.c +bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
verstage-y += i2c.c -verstage-y += media.c verstage-y += monotonic_timer.c +verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
romstage-y += cbmem.c romstage-y += i2c.c -romstage-y += media.c romstage-y += monotonic_timer.c romstage-y += sdram.c +romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
ramstage-y += cbmem.c ramstage-y += i2c.c -ramstage-y += media.c ramstage-y += monotonic_timer.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf diff --git a/src/soc/marvell/bg4cd/media.c b/src/soc/marvell/bg4cd/media.c deleted file mode 100644 index 5a4dc5f..0000000 --- a/src/soc/marvell/bg4cd/media.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <cbfs.h> - -int init_default_cbfs_media(struct cbfs_media *media) -{ - return 0; -}