[M] Change in coreboot[main]: soc/intel/xeon_sp: Improve IRQ routing for Gen6

[Shuo Liu (Code Review)]

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Tim Chu, [e-mail].

Hello Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), [e-mail],

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85153?usp=email

to look at the new patch set (#9).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp: Improve IRQ routing for Gen6
......................................................................

soc/intel/xeon_sp: Improve IRQ routing for Gen6

1. Route IRQ for on-chip end-points only.
2. Route IRQ based on FSP programmed end-point device ID <->
   PIRQ mapping.

TESTED=Build and boot on intel/avenuecity CRB

Change-Id: Ibeb7c8fb3432e5cb240ac3b09c19d2c361e4b45a
Signed-off-by: Shuo Liu 
---
M src/soc/intel/xeon_sp/include/soc/irq.h
M src/soc/intel/xeon_sp/lpc_gen6.c
2 files changed, 52 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/85153/9