New patch to review for coreboot: 3cdbd7b Extend CMOS POST code logging to store extra data
Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4229
-gerrit
commit 3cdbd7b49f25ca4843175d994ac659f7e20b02a3 Author: Duncan Laurie dlaurie@chromium.org Date: Mon Jun 10 10:21:41 2013 -0700
Extend CMOS POST code logging to store extra data
This can be used to indicate sub-state within a POST code range which can assist in debugging BIOS hangs.
For example this can be used to indicate which device is about to be initialized so if the system hangs while talking to that device it can be identified.
Change-Id: I2f8155155f09fe9e242ebb7204f0b5cba3a1fa1e Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: https://gerrit.chromium.org/gerrit/58104 --- src/arch/x86/include/bootblock_common.h | 4 ++++ src/console/Kconfig | 8 ++++++++ src/console/post.c | 34 +++++++++++++++++++++++++++++++++ src/include/console/console.h | 5 +++++ src/include/elog.h | 1 + src/include/pc80/mc146818rtc.h | 9 +++++++++ 6 files changed, 61 insertions(+)
diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h index 11fb230..4926086 100644 --- a/src/arch/x86/include/bootblock_common.h +++ b/src/arch/x86/include/bootblock_common.h @@ -65,6 +65,10 @@ static void cmos_post_init(void) /* Initialize to zero */ cmos_write(0, CMOS_POST_BANK_0_OFFSET); cmos_write(0, CMOS_POST_BANK_1_OFFSET); +#if CONFIG_CMOS_POST_EXTRA + cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); + cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); +#endif }
cmos_write(magic, CMOS_POST_BANK_OFFSET); diff --git a/src/console/Kconfig b/src/console/Kconfig index d209325..c23f862 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -413,6 +413,14 @@ config CMOS_POST_OFFSET If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value defined in the mainboard option table.
+config CMOS_POST_EXTRA + bool "Store extra logging info into CMOS" + depends on CMOS_POST + default n + help + This will enable extra logging of work that happens between post + codes into CMOS for debug. This uses an additional 8 bytes of CMOS. + config IO_POST bool "Send POST codes to an IO port" depends on PC80_SYSTEM diff --git a/src/console/post.c b/src/console/post.c index 11c631d..7488683 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -25,6 +25,9 @@ #include <pc80/mc146818rtc.h> #include <smp/spinlock.h> #endif +#if CONFIG_CMOS_POST_EXTRA +#include <device/device.h> +#endif #include <elog.h>
/* Write POST information */ @@ -51,6 +54,9 @@ DECLARE_SPIN_LOCK(cmos_post_lock) void cmos_post_log(void) { u8 code = 0; +#if CONFIG_CMOS_POST_EXTRA + u32 extra = 0; +#endif
spin_lock(&cmos_post_lock);
@@ -58,9 +64,15 @@ void cmos_post_log(void) switch (cmos_read(CMOS_POST_BANK_OFFSET)) { case CMOS_POST_BANK_0_MAGIC: code = cmos_read(CMOS_POST_BANK_1_OFFSET); +#if CONFIG_CMOS_POST_EXTRA + extra = cmos_read32(CMOS_POST_BANK_1_EXTRA); +#endif break; case CMOS_POST_BANK_1_MAGIC: code = cmos_read(CMOS_POST_BANK_0_OFFSET); +#if CONFIG_CMOS_POST_EXTRA + extra = cmos_read32(CMOS_POST_BANK_0_EXTRA); +#endif break; }
@@ -78,9 +90,31 @@ void cmos_post_log(void) "in previous boot: 0x%02x\n", code); #if CONFIG_ELOG elog_add_event_word(ELOG_TYPE_LAST_POST_CODE, code); +#if CONFIG_CMOS_POST_EXTRA + if (extra) + elog_add_event_dword(ELOG_TYPE_POST_EXTRA, extra); +#endif #endif } } + +#if CONFIG_CMOS_POST_EXTRA +void post_log_extra(u32 value) +{ + spin_lock(&cmos_post_lock); + + switch (cmos_read(CMOS_POST_BANK_OFFSET)) { + case CMOS_POST_BANK_0_MAGIC: + cmos_write32(CMOS_POST_BANK_0_EXTRA, value); + break; + case CMOS_POST_BANK_1_MAGIC: + cmos_write32(CMOS_POST_BANK_1_EXTRA, value); + break; + } + + spin_unlock(&cmos_post_lock); +} +#endif /* CONFIG_CMOS_POST_EXTRA */ #endif /* !__PRE_RAM__ */
static void cmos_post_code(u8 value) diff --git a/src/include/console/console.h b/src/include/console/console.h index 9f347ad..e6962cc 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -72,6 +72,11 @@ void console_init(void); void console_tx_byte(unsigned char byte); void console_tx_flush(void); void post_code(u8 value); +#if CONFIG_CMOS_POST_EXTRA +void post_log_extra(u32 value); +#else +#define post_log_extra(x) do {} while (0) +#endif /* this function is weak and can be overridden by a mainboard function. */ void mainboard_post(u8 value); void __attribute__ ((noreturn)) die(const char *msg); diff --git a/src/include/elog.h b/src/include/elog.h index b813a10..f9b5d53 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -140,6 +140,7 @@ struct elog_event_data_me_extended {
/* Last post code from previous boot */ #define ELOG_TYPE_LAST_POST_CODE 0xa3 +#define ELOG_TYPE_POST_EXTRA 0xa6
/* EC Shutdown Reason */ #define ELOG_TYPE_EC_SHUTDOWN 0xa5 diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 170a433..1c3be0e 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -197,11 +197,20 @@ static inline int get_option(void *dest __attribute__((unused)), # endif #endif
+/* + * 0 = Bank Select Magic + * 1 = Bank 0 POST + * 2 = Bank 1 POST + * 3-6 = BANK 0 Extra log + * 7-10 = BANK 1 Extra log + */ #define CMOS_POST_BANK_OFFSET (CMOS_POST_OFFSET) #define CMOS_POST_BANK_0_MAGIC 0x80 #define CMOS_POST_BANK_0_OFFSET (CMOS_POST_OFFSET + 1) +#define CMOS_POST_BANK_0_EXTRA (CMOS_POST_OFFSET + 3) #define CMOS_POST_BANK_1_MAGIC 0x81 #define CMOS_POST_BANK_1_OFFSET (CMOS_POST_OFFSET + 2) +#define CMOS_POST_BANK_1_EXTRA (CMOS_POST_OFFSET + 7)
void cmos_post_log(void); #endif /* CONFIG_CMOS_POST */
-
Stefan Reinauer