Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3555
-gerrit
commit 6c13b74d2a899e7054f4a19c9ec9ab402dd83fdb Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Tue Jun 25 23:17:43 2013 +0300
Add directive __SIMPLE_DEVICE__
The tests for __PRE_RAM__ or __SMM__ were repeatedly used for detection if dev->ops in the devicetree are not available and simple device model functions need be used.
If a source file build for ramstage had __PRE_RAM__ inserted at the beginning, the struct device would no longer match the allocation the object had taken. This problem is fixed by replacing such cases with explicit __SIMPLE_DEVICE__.
Change-Id: Ib74c9b2d8753e6e37e1a23fcfaa2f3657790d4c0 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/arch/armv7/include/arch/rules.h | 35 +++++++++++++++++++++++++++ src/arch/x86/include/arch/cpu.h | 9 ++++--- src/arch/x86/include/arch/io.h | 6 ++++- src/arch/x86/include/arch/rules.h | 39 ++++++++++++++++++++++++++++++ src/include/device/device.h | 21 ++++++++++------ src/include/device/pci.h | 8 +++--- src/include/device/pnp.h | 6 +++-- src/lib/uart8250mem.c | 4 +-- src/northbridge/intel/gm45/ram_calc.c | 6 ++--- src/northbridge/intel/sch/port_access.c | 6 ++--- src/southbridge/amd/agesa/hudson/reset.c | 6 ++--- src/southbridge/amd/cimx/sb700/reset.c | 6 ++--- src/southbridge/amd/cimx/sb800/reset.c | 6 ++--- src/southbridge/amd/cimx/sb900/early.c | 6 ++--- src/southbridge/amd/cimx/sb900/reset.c | 6 ++--- src/southbridge/amd/sb600/reset.c | 6 ++--- src/southbridge/amd/sb700/reset.c | 3 ++- src/southbridge/amd/sb800/reset.c | 6 ++--- src/southbridge/intel/i82801gx/usb_debug.c | 6 ++--- 19 files changed, 141 insertions(+), 50 deletions(-)
diff --git a/src/arch/armv7/include/arch/rules.h b/src/arch/armv7/include/arch/rules.h new file mode 100644 index 0000000..222dfa1 --- /dev/null +++ b/src/arch/armv7/include/arch/rules.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _ARCH_RULES_H +#define _ARCH_RULES_H + +/* For romstage and ramstage always build with simple device model, ie. + * PCI, PNP and CPU functions operate without use of devicetree. + * + * For ramstage individual source file may define __SIMPLE_DEVICE__ + * before including any header files to force that particular source + * be built with simple device model. + */ + +#if defined(__SIMPLE_DEVICE__) || defined(__PRE_RAM__) +#undef __SIMPLE_DEVICE__ +#define __SIMPLE_DEVICE__ +#endif + +#endif /* _ARCH_RULES_H */ diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 7363132..04398db 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -2,6 +2,7 @@ #define ARCH_CPU_H
#include <stdint.h> +#include <arch/rules.h>
/* * EFLAGS bits @@ -141,12 +142,14 @@ static inline unsigned int cpuid_edx(unsigned int op) #define X86_VENDOR_ANY 0xfe #define X86_VENDOR_UNKNOWN 0xff
-#if !defined(__PRE_RAM__) && !defined(__SMM__) -#include <device/device.h> +#include <arch/io.h>
int cpu_phys_address_size(void); int cpu_have_cpuid(void);
+#ifndef __SIMPLE_DEVICE__ +#include <device/device.h> + struct cpu_device_id { unsigned vendor; unsigned device; @@ -188,8 +191,6 @@ static inline unsigned long cpu_index(void) ci = cpu_info(); return ci->index; } -#else -#include <arch/io.h> #endif
#ifndef __ROMCC__ // romcc is segfaulting in some cases diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index de4e1e3..b73137b 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -2,6 +2,7 @@ #define _ASM_IO_H
#include <stdint.h> +#include <arch/rules.h>
/* * This file contains the definitions for the x86 IO instructions @@ -188,6 +189,9 @@ static inline int log2f(int value) return r;
} +#endif + +#ifdef __SIMPLE_DEVICE__
#define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \ (((SEGBUS) & 0xFFF) << 20) | \ @@ -339,7 +343,7 @@ void pnp_set_drq(simple_pnpdev_t dev, unsigned index, unsigned drq) pnp_write_config(dev, index, drq & 0xff); }
-#endif /* __PRE_RAM__ */ +#endif /* __SIMPLE_DEVICE__ */
#endif
diff --git a/src/arch/x86/include/arch/rules.h b/src/arch/x86/include/arch/rules.h new file mode 100644 index 0000000..c569f8a --- /dev/null +++ b/src/arch/x86/include/arch/rules.h @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _ARCH_RULES_H +#define _ARCH_RULES_H + +/* For romstage and ramstage always build with simple device model, ie. + * PCI, PNP and CPU functions operate without use of devicetree. + * + * For ramstage individual source file may define __SIMPLE_DEVICE__ + * before including any header files to force that particular source + * be built with simple device model. + */ + +#if defined(__SIMPLE_DEVICE__) || defined(__PRE_RAM__) || defined(__SMM__) +#undef __SIMPLE_DEVICE__ +#define __SIMPLE_DEVICE__ +#endif + +#if defined(__PRE_RAM__) || defined(__SMM__) +#include <arch/io.h> +#endif + +#endif /* _ARCH_RULES_H */ diff --git a/src/include/device/device.h b/src/include/device/device.h index bcfe03b..2413b30 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -1,14 +1,17 @@ #ifndef DEVICE_H #define DEVICE_H
+ #ifndef __SMM__ #include <stdint.h> #include <stddef.h> +#include <arch/rules.h> #include <device/resource.h> #include <device/path.h>
struct device; -#ifndef __PRE_RAM__ + +#ifndef __SIMPLE_DEVICE__ typedef struct device * device_t; typedef unsigned int simple_pcidev_t; typedef unsigned int simple_pnpdev_t; @@ -47,7 +50,7 @@ struct device_operations { const struct pci_bus_operations *ops_pci_bus; const struct pnp_mode_ops *ops_pnp_mode; }; -#endif +#endif /* ! __SIMPLE_DEVICE__ */
struct bus { @@ -118,9 +121,10 @@ struct device { * static.c file and is generated by the config tool at compile time. */ extern ROMSTAGE_CONST struct device dev_root; -#ifndef __PRE_RAM__ -extern struct device *all_devices; /* list of all devices */
+#ifndef __SIMPLE_DEVICE__ + +extern struct device *all_devices; /* list of all devices */ extern struct resource *free_resources; extern struct bus *free_links;
@@ -224,13 +228,16 @@ void fixed_mem_resource(device_t dev, unsigned long index,
void tolm_test(void *gp, struct device *dev, struct resource *new); u32 find_pci_tolm(struct bus *bus); -#else + +#else /* vv __SIMPLE_DEVICE__ vv */ + ROMSTAGE_CONST struct device * dev_find_slot (unsigned int bus, unsigned int devfn); ROMSTAGE_CONST struct device * dev_find_slot_on_smbus (unsigned int bus, unsigned int addr); + #endif -#else /* __SMM__ */ -#include <arch/io.h> + #endif /* __SMM__ */ + #endif /* DEVICE_H */ diff --git a/src/include/device/pci.h b/src/include/device/pci.h index c4978ef..9c28c7b 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -17,10 +17,12 @@
#include <stdint.h> #include <stddef.h> +#include <arch/rules.h> #include <device/pci_def.h> -#include <device/resource.h> #include <device/device.h> -#if !defined(__PRE_RAM__) && !defined(__SMM__) + +#ifndef __SIMPLE_DEVICE__ +#include <device/resource.h> #include <device/pci_ops.h> #include <device/pci_rom.h>
@@ -107,5 +109,5 @@ static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus) return bops; }
-#endif +#endif /* ! __SIMPLE_DEVICE__ */ #endif /* PCI_H */ diff --git a/src/include/device/pnp.h b/src/include/device/pnp.h index 434f0a4..a229edb 100644 --- a/src/include/device/pnp.h +++ b/src/include/device/pnp.h @@ -2,10 +2,12 @@ #define DEVICE_PNP_H
#include <stdint.h> +#include <arch/rules.h> #include <device/device.h> #include <device/pnp_def.h>
-#if !defined(__PRE_RAM__) && !defined(__SMM__) +#ifndef __SIMPLE_DEVICE__ + /* Primitive PNP resource manipulation */ void pnp_write_config(device_t dev, u8 reg, u8 value); u8 pnp_read_config(device_t dev, u8 reg); @@ -59,5 +61,5 @@ struct pnp_mode_ops { void pnp_enter_conf_mode(device_t dev); void pnp_exit_conf_mode(device_t dev);
-#endif +#endif /* ! __SIMPLE_DEVICE__ */ #endif /* DEVICE_PNP_H */ diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 8224843..3d1bd10 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -24,7 +24,7 @@ #if CONFIG_USE_OPTION_TABLE #include "option_table.h" #endif -#if !defined(__SMM__) && !defined(__PRE_RAM__) +#if !defined(__SIMPLE_DEVICE__) #include <device/device.h> #endif #include <delay.h> @@ -129,7 +129,7 @@ u32 uart_mem_init(void) /* Now find the UART base address and calculate the divisor */ #if CONFIG_DRIVERS_OXFORD_OXPCIE
-#if defined(MORE_TESTING) && !defined(__SMM__) && !defined(__PRE_RAM__) +#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) device_t dev = dev_find_device(0x1415, 0xc158, NULL); if (!dev) dev = dev_find_device(0x1415, 0xc11b, NULL); diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c index 9e54c10..4590544 100644 --- a/src/northbridge/intel/gm45/ram_calc.c +++ b/src/northbridge/intel/gm45/ram_calc.c @@ -19,9 +19,9 @@ * MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <stdint.h> #include <arch/io.h> #include <device/pci_def.h> diff --git a/src/northbridge/intel/sch/port_access.c b/src/northbridge/intel/sch/port_access.c index c73f709..a33a564 100644 --- a/src/northbridge/intel/sch/port_access.c +++ b/src/northbridge/intel/sch/port_access.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <stdint.h> #include <arch/io.h> #include <device/pci_def.h> diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index 315a065..79fd79e 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb700/reset.c b/src/southbridge/amd/cimx/sb700/reset.c index 7a96aa4..36f96d3 100644 --- a/src/southbridge/amd/cimx/sb700/reset.c +++ b/src/southbridge/amd/cimx/sb700/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c index 7a96aa4..36f96d3 100644 --- a/src/southbridge/amd/cimx/sb800/reset.c +++ b/src/southbridge/amd/cimx/sb800/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb900/early.c b/src/southbridge/amd/cimx/sb900/early.c index d6036dd..4879904 100644 --- a/src/southbridge/amd/cimx/sb900/early.c +++ b/src/southbridge/amd/cimx/sb900/early.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <stdint.h> #include <device/pci_ids.h> #include <arch/io.h> diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c index 7a96aa4..36f96d3 100644 --- a/src/southbridge/amd/cimx/sb900/reset.c +++ b/src/southbridge/amd/cimx/sb900/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/amd/sb600/reset.c b/src/southbridge/amd/sb600/reset.c index 0936516..1ef408b 100644 --- a/src/southbridge/amd/sb600/reset.c +++ b/src/southbridge/amd/sb600/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c index ef4115e..3c993d1 100644 --- a/src/southbridge/amd/sb700/reset.c +++ b/src/southbridge/amd/sb700/reset.c @@ -18,7 +18,8 @@ */
#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ +// Use simple device model for this file even in ramstage #endif #include <arch/io.h> #include <reset.h> diff --git a/src/southbridge/amd/sb800/reset.c b/src/southbridge/amd/sb800/reset.c index 315a065..79fd79e 100644 --- a/src/southbridge/amd/sb800/reset.c +++ b/src/southbridge/amd/sb800/reset.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h>
diff --git a/src/southbridge/intel/i82801gx/usb_debug.c b/src/southbridge/intel/i82801gx/usb_debug.c index bdea889..8b29b98 100644 --- a/src/southbridge/intel/i82801gx/usb_debug.c +++ b/src/southbridge/intel/i82801gx/usb_debug.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#ifndef __PRE_RAM__ -#define __PRE_RAM__ // Use simple device model for this file even in ramstage -#endif +// Use simple device model for this file even in ramstage +#define __SIMPLE_DEVICE__ + #include <stdint.h> #include <arch/io.h> #include <console/console.h>
-
Kyösti Mälkki