Attention is currently required from: Bora Guvendik, Furquan Shaikh, Maulik V Vaghela, Sridhar Siricilla, Subrata Banik, Balaji Manigandan, Ronak Kanabar, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph.
Hello Bora Guvendik, build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Sridhar Siricilla, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Bernardo Perez Priego, Tim Wawrzynczak, Patrick Rudolph, Tim Wawrzynczak, Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55094
to look at the new patch set (#6).
Change subject: vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2207_01
......................................................................
vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2207_01
The headers added are generated as per FSP v2207_01.
Previous FSP version was v2162_00.
Changes Include:
- Add IbeccProtectedRangeEnable, IbeccProtectedRangeBase and
IbeccProtectedRangeMask in FspmUpd.h
- Add UsbTcPortEn in FspsUpd.h
- Adjust Reserved UPD Offset in FspmUpd.h
- Few UPDs description update in FspmUpd.h and FspsUpd.h
BUG=b:189731004
BRANCH=None
TEST=Build and boot brya
Change-Id: Ice44dfbd41e8eca4f171b76e7a3dcdf133a516fd
Cq-Depend: chrome-internal:3876956, chrome-internal:3909162,
chrome-internal:3909163
Signed-off-by: Ronak Kanabar ronak.kanabar@intel.com
---
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
2 files changed, 121 insertions(+), 108 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/55094/6
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Gerrit-Project: coreboot
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Gerrit-Change-Number: 55094
Gerrit-PatchSet: 6
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