Change in coreboot[master]: coreboot tables: Add PCIe info to coreboot table

[Jianjun Wang (Code Review)]

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Julius Werner, Arthur Heymans, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63251 )

Change subject: coreboot tables: Add PCIe info to coreboot table
......................................................................

Patch Set 12:

(1 comment)

File src/lib/coreboot_table.c:

https://review.coreboot.org/c/coreboot/+/63251/comment/5b5b1a6e_0e95aad1 
PS12, Line 36: __weak enum cb_err lb_fill_pcie(struct lb_pcie *pcie)
             : {
             : 	return CB_ERR;
             : }
> > I think we can get the information from device tree directly by define this function, so we don't  […]

That might be a solution, but not every SoC will fill all of these base addresses. For MediaTek platform, we only need to fill the controller's base address, but the config and the atu base will be needed for Qualcomm platform, so I think it might be a good idea to let the caller decide which one they need to fill and pass to the payloads.

Since we have already define the controller's base address in devicetree.cb, I think we can get it directly instead of to define another macro with same value, what do you think?