Change in coreboot[master]: coreboot_tables: Add PCIe info to coreboot table

[Julius Werner (Code Review)]

Attention is currently required from: Shelley Chen, Hung-Te Lin, Nico Huber, Rex-BC Chen, Arthur Heymans, Yu-Ping Wu, Jianjun Wang.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63251 )

Change subject: coreboot_tables: Add PCIe info to coreboot table
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Patch Set 18:

(1 comment)

Patchset:

PS9:
> The other end of the spectrum is to pass minimal data (such as ctrl_base), and leave other offsets (0x1000, 0x140, ...) to be defined in each platform driver in libpayload.

Oh, do we always need a platform driver on the libpayload side anyway? I thought that maybe they could all be handled the same...

If libpayload has individual platform drivers anyway, then yeah, only encode things that we expect may change between SoCs using the same driver (sounds like that's ctrl_base and maybe mmio_size?), and hardcode the rest in the driver (e.g. specific offsets from ctrl_base).