Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29884
Change subject: soc/intel/skylake: Rework acpi/cpu.asl ......................................................................
soc/intel/skylake: Rework acpi/cpu.asl
Change-Id: I182585fd09e4ce848c860d00eb612e8f5fdde35e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/acpi/cpu.asl 2 files changed, 20 insertions(+), 88 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/29884/1
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 6687ea1..db1b77b 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -550,6 +550,21 @@ acpigen_pop_len(); } } + /* PPKG is usually used for thermal management + of the first and only package. */ + acpigen_write_processor_package("PPKG", 0, cores_per_package); + + /* Add a method to notify processor nodes */ + acpigen_write_method("\_PR.CNOT", 1); + for (core_id = 0; core_id < cores_per_package; core_id++) { + char buffer[DEVICE_PATH_MAX]; + snprintf(buffer, sizeof(buffer), "\_PR.CP%c%c", + '0' + core_id / 10, '0' + core_id % 10); + acpigen_emit_byte(NOTIFY_OP); + acpigen_emit_namestring(buffer); + acpigen_emit_byte(ARG0_OP); + } + acpigen_pop_len(); }
static unsigned long acpi_fill_dmar(unsigned long current) diff --git a/src/soc/intel/skylake/acpi/cpu.asl b/src/soc/intel/skylake/acpi/cpu.asl index a202ceb..761c435 100644 --- a/src/soc/intel/skylake/acpi/cpu.asl +++ b/src/soc/intel/skylake/acpi/cpu.asl @@ -13,106 +13,23 @@ * GNU General Public License for more details. */
-/* These devices are created at runtime */ -External (_PR.CP00, DeviceObj) -External (_PR.CP01, DeviceObj) -External (_PR.CP02, DeviceObj) -External (_PR.CP03, DeviceObj) -External (_PR.CP04, DeviceObj) -External (_PR.CP05, DeviceObj) -External (_PR.CP06, DeviceObj) -External (_PR.CP07, DeviceObj) +/* These come from the dynamically created CPU SSDT */ +External (_PR.CNOT, MethodObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ Method (PNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (_PR.CP00, 0x81) // _CST - Notify (_PR.CP01, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (_PR.CP02, 0x81) // _CST - Notify (_PR.CP03, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (_PR.CP04, 0x81) // _CST - Notify (_PR.CP05, 0x81) // _CST - Notify (_PR.CP06, 0x81) // _CST - Notify (_PR.CP07, 0x81) // _CST - } + _PR.CNOT (0x81) }
/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ Method (PPCN) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (_PR.CP00, 0x80) // _PPC - Notify (_PR.CP01, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (_PR.CP02, 0x80) // _PPC - Notify (_PR.CP03, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (_PR.CP04, 0x80) // _PPC - Notify (_PR.CP05, 0x80) // _PPC - Notify (_PR.CP06, 0x80) // _PPC - Notify (_PR.CP07, 0x80) // _PPC - } + _PR.CNOT (0x81) }
/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ Method (TNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (_PR.CP00, 0x82) // _TPC - Notify (_PR.CP01, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (_PR.CP02, 0x82) // _TPC - Notify (_PR.CP03, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (_PR.CP04, 0x82) // _TPC - Notify (_PR.CP05, 0x82) // _TPC - Notify (_PR.CP06, 0x82) // _TPC - Notify (_PR.CP07, 0x82) // _TPC - } -} - -/* Return a package containing enabled processor entries */ -Method (PPKG) -{ - If (LGreaterEqual (\PCNT, 8)) { - Return (Package() - { - _PR.CP00, - _PR.CP01, - _PR.CP02, - _PR.CP03, - _PR.CP04, - _PR.CP05, - _PR.CP06, - _PR.CP07 - }) - } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package () - { - _PR.CP00, - _PR.CP01, - _PR.CP02, - _PR.CP03 - }) - } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package () - { - _PR.CP00, - _PR.CP01 - }) - } Else { - Return (Package () - { - _PR.CP00 - }) - } + _PR.CNOT (0x82) }