Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Angel Pons, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Paul Menzel, Rex-BC Chen, Angel Pons, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62933
to look at the new patch set (#3).
Change subject: soc/mediatek: Add timestamp to measure PERST# time ......................................................................
soc/mediatek: Add timestamp to measure PERST# time
Add timestamp support to measure the assertion time of PERST#.
TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the measured PERST# time: [DEBUG] mtk_pcie_domain_enable: 432517 us elapsed since assert PERST# [INFO ] mtk_pcie_domain_enable: PCIe link up success (17 tries)
And the SSD information in boot log is as follows: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006
BUG=b:178565024 BRANCH=cherry
Signed-off-by: Jianjun Wang jianjun.wang@mediatek.com Change-Id: Ie2b7b6174abdf951af5796ab5ed141c45f32fc71 --- M src/soc/mediatek/common/Kconfig M src/soc/mediatek/common/pcie.c M src/soc/mediatek/mt8195/pcie.c 3 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/62933/3