Change in coreboot[master]: soc/amd/cezanne: Enable secure counters

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Rob Barnes, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59477

to look at the new patch set (#3).

Change subject: soc/amd/cezanne: Enable secure counters
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soc/amd/cezanne: Enable secure counters

Guybrush uses secure counters to protect against High Definition (HD)
protected content rollback. These secure counters are hosted in TPM
NVRAM. Enable secure counters so that they are defined in PSP verstage.

BUG=b:205261728
TEST=Build and boot to OS in Guybrush. Ensure that the secure counters
are defined successfully in TPM NVRAM.

Change-Id: I6818c6f7905aa2eb815059e23c4f79437593f8ca
Signed-off-by: Karthikeyan Ramasubramanian 
---
M src/soc/amd/cezanne/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/59477/3