[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Subrata Banik (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Felix Held, Hannah Williams, Jamie Ryu, Saurabh Mishra.

Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 18:

(1 comment)

File src/soc/intel/common/block/include/intelblocks/pmclib.h:

https://review.coreboot.org/c/coreboot/+/84104/comment/b8b143ed_1ecd4165?usp... :
PS11, Line 241: gpe0_mask
> @[e-mail]   I do not see use case for pmc_enable_std_gpe and pmc_disable_std_gpe. Where is this going be used?  I think we just need to be able to disable all GPE0 and GPE1 bits and also clear all of them from Coreboot boot sequence.  
> Can we just have pmc_disable_all_gpe and remove pmc_enable_std_gpe and pmc_disable_std_gpe?

isn't `pmc_enable_std_gpe` also part of the pmc_disable_all_gpe? (ideally that should be the flow). I agree with you that we are not calling pmc_enable_std_gpe/pmc_disable_std_gpe today in BIOS flow. But those are useful APIs to be used while debugging the issue. As per my suggestion above, I have extended the GPE0 PMC_B0/Hot_Plug/PCI_exp status to GPE1 events.