Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu.
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80094?usp=email )
Change subject: soc/intel/xeon_sp: Add generic function to locate devices ......................................................................
soc/intel/xeon_sp: Add generic function to locate devices
Provide a helper function to locate PCI devices on a given socket by their PCI vendor and device IDs.
Change-Id: I266360588548ba579f46b228c4d5b3ae6e39a029 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h 2 files changed, 30 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/80094/1
diff --git a/src/soc/intel/xeon_sp/chip_common.c b/src/soc/intel/xeon_sp/chip_common.c index cf488c4..f775ad7 100644 --- a/src/soc/intel/xeon_sp/chip_common.c +++ b/src/soc/intel/xeon_sp/chip_common.c @@ -20,6 +20,32 @@ return &hob->PlatformData.IIO_resource[dn / MAX_LOGIC_IIO_STACK].StackRes[dn % MAX_LOGIC_IIO_STACK]; }
+/** + * Find a device of a given vendor and type for the specified socket. + * The function iterates over all PCI domains of the specified socket + * and matches the PCI vendor and device ID. + * + * @param socket The socket where to search for the device. + * @param vendor A PCI vendor ID (e.g. 0x8086 for Intel). + * @param device A PCI device ID. + * @return Pointer to the device struct. + */ +struct device *dev_find_device_on_socket(uint8_t socket, u16 vendor, u16 device) +{ + struct device *domain, *dev = NULL; + + while ((dev = dev_find_device(vendor, device, dev))) { + domain = dev_get_pci_domain(dev); + if (!domain) + continue; + if ((domain->path.domain.domain / MAX_LOGIC_IIO_STACK) != socket) + continue; + return dev; + } + + return NULL; +} + void iio_pci_domain_read_resources(struct device *dev) { struct resource *res; @@ -82,14 +108,14 @@ bus->subordinate = sr->BusBase; bus->max_subordinate = sr->BusLimit;
- printk(BIOS_SPEW, "Scanning IIO stack %d: busses %x-%x\n", dev->path.domain.domain, + printk(BIOS_ERR, "Scanning IIO stack %d: personality: %d busses %x-%x\n", dev->path.domain.domain, sr->Personality, dev->link_list->secondary, dev->link_list->max_subordinate); pci_host_bridge_scan_bus(dev); }
/* * Used by IIO stacks for PCIe bridges. Those contain 1 PCI host bridges, - * all the bus numbers on the IIO stack can be used for this bridge + * all the bus numbers on the IIO stack can be used for this bridge. */ static struct device_operations iio_pcie_domain_ops = { .read_resources = iio_pci_domain_read_resources, diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index dcfb0a0..eb77203 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -9,6 +9,8 @@ void iio_pci_domain_scan_bus(struct device *dev); void attach_stacks(struct device *dev);
+struct device *dev_find_device_on_socket(uint8_t socket, u16 vendor, u16 device); + void soc_create_ioat_domains(struct bus *bus, const STACK_RES *sr);
#endif /* _CHIP_COMMON_H_ */